IBM 7090 - Page 34

Figure 3. I-S shows a basic adder circuit. The adder circuit is designed to use three
inputs at one time with one of the three inputs being a carry from the next low order
position. The adder produces two outputs, a sum and a carry. The adders are designed
to follow the example of binary addition illustrated in Figure 3.1-9.
Some adders have several inputs because the adders have multiple uses. However,
only two of the outside inputs and the carry in can be active at the same time. The add-
ing function of these multipurpose adders is the same as shown in the basic adder cir-
cuit, Figure 3. I-S.
Adder Unit and Look Ahead Circuits (LAC)
The basic principle behind connecting individual adders together to make an adder
unit is to take the carry out of one adder and connect to the carry in of the next high
order position adder. This would mean that, if all adder positions contained a one and
a one was added to the low order position, a carry would have to ripple through the adder
unit from the low order position to the high order position. As the carry ripples through
the adders the logic circuits introduce a delay into this action. The 7090 is too fast to
accept these conditions. To overcome this slow ripple condition in the adders, the 7090
adders have associated circuits that speed up the carry operation. These circuits de-
termine how many adder positions the carry must go through, then send the carry al-
most immediately to a higher order adder a few positions from the initial carry impulse.
These carry speed -up circuits are called look ahead circuits (LAC). The logic of the
operation of the look ahead circuits is shown in Figure 3.1-10 and Figure 3.1-11. Notice
that for look ahead purposes the adders are grouped into five groups of five adders each
and two groups of six adders. The output of the first stage LAC feeds the inputs of the
second stage LAC.
All adder positions, except the Q position, have two LAC outputs. One is the OR
LAC
and the other is the AND LAC. The OR LAC gives a usable output to the first stage
LAC when a bit is sent to either input 1 or input 2 or both. The AND LAC gives a usable
output to the first stage LAC when bits are sent to both inputs 1 and 2.
There are two outputs from the first stage LAC. One output is the carry out LAC and
the other output is active when all adders in the group are receiving at least one input.
This latter output is simply called look-ahead. The carry out (CO) LAC is active when
any combination of bits in that particular group of adders would cause a carry out of the
high order adder of the group.
The second stage LAC uses the outputs of the first stage LAC, along with a line to
indicate a carry in or a bit to adder 35. These LAC initiate a carry into the low order
adder of the next higher group.
Following through the first and second stage LAC, note that if adder 35 has an AND
LAC output and adders 34-30 have OR LAC outputs, a carry in would be sent to adder
29. If all adders have an OR LAC output, these outputs would cause a carry in to be
sent to adders 29, 24, 19, 14, S, and 3 almost simultaneously if a carry into adder 35
occurred.
Note that a carry has to ripple through a maximum of 6 adders rather than through
37 because of the look ahead circuits, and the carry operation through the adders has
been greatly speeded up.
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