IBM 7090 - Page 57

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AS(lO-17)+SC

III

(D1)

2.11.78.1

Shift

Gate

LI

to

SC

= 0

Set

al'ld

Shift

AC

RT

Step

SC

Each

Clock

Pulse

FIGURE

5.3-11.

ARS

+0771

Step

SC

Each

Clock

Pulse

2.11.79.1

Shift

Gate

LIto

SC

= 0

2.11.79.1

Set

and Shift

AC(Q-34)

and

MQ(I-34)

RT

2.12.33.1

2.12.43.1

Yes

LRS

AC(S)-.MQ(S)

AC(35)

.....

MQ(l)

2.12.33.1

2.12.33.1

FIGURE

5.3-12.

LRS

+0765;

LGR

-0765

2.12.43.1

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