IBM 7090 - Page 79

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When

signs

are

unlike,

a

complement

addition

occurs.

A

column

9

carry

resulting

from

this

addition

means

the

AC

fraction

was

smaller

than

the

SR

fraction

and

the

re-

sult

placed

in

the

AC

is

a

true

number.

Assuming

the

MQ

to

be

zero,

this

true

number

is

1

less

than

the

sum,

because

the

1

's

complement

of

the

AC

fraction

was

used

for

addi-

tion.

Therefore,

a

one

is

added

to

the

AC

fraction.

If

the

MQ

contains

something

other

than

zero,

the

result

of

the

addition

is

1

minus

MQ

fraction

less

than

it

should

be.

There-

fore,

one

is

not

added

to

the

AC

fraction,

but

the

MQ

is

subtracted

from

this

one.

This

is

done

by,

in

effect,

complementing

the

MQ.

Because

no

provisions

are

in

the

circuits

to

complement

the

MQ,

the

MQ

contents

are

moved

to

the

AC

through

the

SR.

The

re-

sult

of

the

addition

is

moved

to

the

SR

when

the

MQ

contents

are

brought

into

the

AC.

Fourth

Step L

Time.

Fourth

step

L

time

is

used

to:

1.

Complement

the

AC

fraction.

a.

AC

contains

original

MQ

fraction

if

the

MQ

was

not

zero.

b.

If

original

MQ

fraction

was

zero,

it

was

not

moved

to

the

AC;

therefore,

this

complementing

is

used

to

test

the

AC

fraction

for

a

zero

result

of

the

addition.

2.

If

the

MQ

and

AC

are

zero,

clear

the

AC

to

give

a

zero

characteristic.

3.

End

operation

if

normalizing

is

not

needed.

a,

If

AC

and

MQ

are

zero.

b.

If

AC

(9)

contains

a

one.

After

complementing

the

AC

fraction

with

the

FP

trigger

on

(MQ

was

not

zero),

the

complement

is

sent

to

the

MQ

and

the

result

of

the

addition

is

moved

from

the

SR

back

to

the

AC.

Again

available

circuits

must

be

used

to

get

the

complement

to

the

MQ.

Therefore,

the

AC

is

gated

to

the

SR

and

the

SR

is

gated

to

the

MQ.

Fifth

Step

L

Time.

Fifth

step

L

time

is

used

for

normalizing

the

result

and

ending

operation.

Normalizing

is

done

by

(1)

shifting

the

AC

and

MQ

fractions

left

until

AC(9)

receives

a

one,

(2)

counting

the

number

of

shifts,

and (3)

subtracting

the

number

of

shifts

from

the

characteristic.

The

SC

is

used

to

count

the

number

of

shifts.

Since

the

SC

is

a

count

down

counter

which

starts

from

zero,

the

2's

complement

of

the

number

of

shifts

will

be

in

the

SC

when

shifting

is

stopped.

Adding

this

complement

to

the

characteristic

of

the

AC

gives

the

correct

adjusted

characteristic.

I

Time.

I

time

of

the

next

instruction

sets

the

MQ(S) and

characteristic.

The

AC(S)

is

gated

to

the

MQ(S)

so

both

signs

are

the

same.

For

an

MQ

and

AC

fraction

that

is

not

zero,

the

characteristic

of

the

MQ

is

set

2710

(338)

less

than

the

AC

characteristic.

This

is

done

by

adding

the

2's

complement

of

338

to

the

AC

characteristic

and

putting

the

result

into

the

MQ

characteristic.

Unnormalized

Floating

Add

UF A

-0300

(Min

I,

E,

3L)

(Max

I,

E,

8L)

This

instruction

algebraically

adds

two

floating-point

numbers

in

the

same

manner

as

FAD.

The

result,

however,

is

not

normalized.

The

sequence

of

operation

for

UF

A

is

the

same

as

FAD

with

these

exceptions:

1.

For

like

SR

and

AC

signs,

UF

A

ends

operation

at

the

end

of

the

third

step

because

a

normalizing

step

is

not

needed.

2.

UF

A

ends

operation

at

the

end

of

the

third

step

if

AC

and

SR

signs

are

unlike

and

there

is

no

column

9

carry

as

a

result

of

the

addition.

This

is

because

the

correct

unnormalized

result

is

in

the

AC

and

MQ

at

the

end

of

the

3rd

step.

78

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