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IBM 7090 - Page 85

IBM 7090
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to
produce
the
proper
characteristic
of
the
product.
Because
both
of
the
original
char-
acteristics
are
the
exponent
plus
2008,
adding
these
characteristics
would
produce
a
resultant
characteristic
2008
too
large.
Therefore,
the
addition
of
the
characteristics
must
be
adjusted
by
2008.
The
execution
of
this
instruction
is
accomplished
by
I,
E,
and
L
cycles.
The
L
cycles
are
divided
into
first
step
L
time
and
second
step
L
time.
The
E
cycle,
in
addition
to
bringing
the
word
from
storage,
has
the
following
objec-
tives:
1.
For
a
zero
MQ
fraction
a.
Put
zeros
in
the
characteristic
of
the
SR
and
the
MQ
b.
End
operation
at
the
end
of
the
E
cycle
2.
For
a
zero
storage
fraction
a.
Reset
the
MQ
b.
End
operation
at
the
end
of
the
E
cycle
3.
Set
338
in
the
SC
(used
to
count
the
number
of
shifts)
4.
Reset
the
AC
If
either
the
MQ
or
the
storage
fraction
is
zero,
the
product
must
also
be
zero.
Therefore,
for
this
zero
condition
the
MQ(1-35)
and
the
AC(Q-35)
contain
zeros
at
the
end
of
the
E
cycle.
This
is
a
normal
zero
product.
For
this
zero
condition
end
opera-
tion
comes
at
the
end
of E
time
because
no
further
multiplication
is
necessary.
To
check
the
MQ
fraction
for
zero,
MQ(9-35)
is
gated
to
the
SR.
The
set
and
hold
of
the
SR
are
not
operated;
the
information
does
not
go
to
the
SR
but
to
the
zero
checking
circuits
on
Systems
2.12.47.1.
The
FP
trigger
is
used
to
remember
the
MQ
zero
condition
and
to
cause
end
operation
at
the
end
of
the
E
cycle.
First
step
L
time
is
used
to
get
the
initial
characteristic
of
the
final
product.
This
characteristic
may
be
changed
at
the
end
of
FMP
if
normalizing
is
required.
The
characteristic
of
the
SR
is
reduced
by
2008
so
the
characteristic
of
the
product
will
be
only
2008
greater
than
the
exponent.
The
multiplicand
characteristic
minus
2008
is
put
into
the
AC,
and
the
multiplier
characteristic
is
put
into
the
SR.
The
two
characteristics
are
added
to
produce
the
AC
characteristic
for
the
product.
During
this
time
the
MQ
characteristic
is
set
to
zero.
Second
step
L
time
is
used
to
do
the
fraction
multiplication
and
to
normalize
the
product.
The
multiplication
is
done
the
same
as
in
MPY,
by
adding
and
shifting.
For
no
bits
in
MQ(34-35)
fast
shifting
occurs,
otherwise
only
three
shifts
per
cycle
take
place.
If
there
is
a
carry
out
of
AD (9)
during
the
add
cycle,
a
one
is
put
into
AC
(9)
when
the
AC
and
MQ
are
shifted
right.
When 338
shifts
are
complete,
the
fraction
multiplication
is
accomplished
and
the
shift
counter
equals
zero.
The
shift
counter
going
to
zero
turns
on
the
FP
trigger,
and
the
trigger
is
used
to
instruct
the
system
that
the
multiplication
part
of
the
instruction
is
finished.
If
AC(9)
is
zero,
a
single
normalizing
step
is
performed.
One
step
is
the
maximum
needed
if
two
normal
numbers
were
used
for
the
multiplication.
84

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