User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
gx_02.fm.(1.2)
March 27, 2006
Programming Model
Page 107 of 377
speculatively executed instructions and restore the machine state to immediately after the branch. This cor-
rection can be done immediately upon resolution of the Condition Registers bits.
Branch Instructions
Table 2-27 lists the branch instructions provided by the PowerPC processors. To simplify assembly language
programming, a set of simplified mnemonics and symbols is provided for the most frequently used forms of
branch conditional, compare, trap, rotate and shift, and certain other instructions. See Appendix F, “Simplified
Mnemonics” in the PowerPC Microprocessor Family: The Programming Environments Manual for a list of
simplified mnemonic examples.
Condition Register Logical Instructions
Condition Register logical instructions and the Move Condition Register Field (mcrf) instruction are also
defined as flow-control instructions. Table 2-28 shows these instructions.
Note: If the LR update option is enabled for any of these instructions, the PowerPC Architecture defines
these forms of the instructions as invalid.
Table 2-27. Branch Instructions
Name Mnemonic Syntax
Branch b (ba bl bla) target_addr
Branch Conditional bc (bca bcl bcla) BO,BI,target_addr
Branch Conditional to Link Register bclr (bclrl)BO,BI
Branch Conditional to Count Register bcctr (bcctrl)BO,BI
Table 2-28. Condition Register Logical Instructions
Name Mnemonic Syntax
Condition Register AND crand crbD,crbA,crbB
Condition Register OR cror crbD,crbA,crbB
Condition Register XOR crxor crbD,crbA,crbB
Condition Register NAND crnand crbD,crbA,crbB
Condition Register NOR crnor crbD,crbA,crbB
Condition Register Equivalent creqv crbD,crbA,crbB
Condition Register AND with Complement crandc crbD,crbA,crbB
Condition Register OR with Complement crorc crbD,crbA,crbB
Move Condition Register Field mcrf crfD,crfS
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