User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
750gx_umLOT.fm.(1.2)
March 27, 2006
List of Tables
Page 15 of 377
List of Tables
Table 1-1. Architecture-Defined Registers (Excluding SPRs) .................................................................42
Table 1-2. Architecture-Defined SPRs Implemented .............................................................................. 43
Table 1-3. Implementation-Specific Registers .........................................................................................44
Table 1-4. 750GX Microprocessor Exception Classifications ..................................................................49
Table 1-5. Exceptions and Conditions .....................................................................................................50
Table 2-1. Additional MSR Bits ...............................................................................................................60
Table 2-2. Additional SRR1 Bits ..............................................................................................................62
Table 2-3. Valid THRM1/THRM2 Bit Settings .........................................................................................79
Table 2-4. Memory Operands ................................................................................................................. 82
Table 2-5. Floating-Point Operand Data-Type Behavior ......................................................................... 84
Table 2-6. Floating-Point Result Data-Type Behavior ............................................................................. 85
Table 2-7. Integer Arithmetic Instructions ................................................................................................92
Table 2-8. Integer Compare Instructions ................................................................................................. 93
Table 2-9. Integer Logical Instructions ....................................................................................................94
Table 2-10. Integer Rotate Instructions .....................................................................................................95
Table 2-11. Integer Shift Instructions ........................................................................................................ 95
Table 2-12. Floating-Point Arithmetic Instructions .....................................................................................96
Table 2-13. Floating-Point Multiply/Add Instructions ................................................................................. 96
Table 2-14. Floating-Point Rounding and Conversion Instructions ........................................................... 97
Table 2-15. Floating-Point Compare Instructions ...................................................................................... 97
Table 2-16. Floating-Point Status and Control Register Instructions ........................................................ 97
Table 2-17. Floating-Point Move Instructions ............................................................................................ 98
Table 2-18. Integer Load Instructions ........................................................................................................99
Table 2-19. Integer Store Instructions .....................................................................................................101
Table 2-20. Integer Load-and-Store with Byte-Reverse Instructions ...................................................... 102
Table 2-21. Integer Load-and-Store Multiple Instructions ....................................................................... 102
Table 2-22. Integer Load-and-Store String Instructions .......................................................................... 103
Table 2-23. Floating-Point Load Instructions ........................................................................................... 104
Table 2-24. Floating-Point Store Instructions ..........................................................................................105
Table 2-25. Store Floating-Point Single Behavior ...................................................................................105
Table 2-26. Store Floating-Point Double Behavior ..................................................................................105
Table 2-27. Branch Instructions ..............................................................................................................107
Table 2-28. Condition Register Logical Instructions ................................................................................ 107
Table 2-29. Trap Instructions ..................................................................................................................108
Table 2-30. System Linkage Instruction—UISA ......................................................................................108
Table 2-31. Move-to/Move-from Condition Register Instructions ............................................................108
Table 2-32. Move-to/Move-from Special-Purpose Register Instructions (UISA) ..................................... 109
Table 2-33. PowerPC Encodings ............................................................................................................ 109
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