IBM PowerPC 750GX

To Next Page

To Previous Page

User’s Manual

IBM PowerPC 750GX and 750GL RISC Microprocessor

gx_06.fm.(1.2)

March 27, 2006

Instruction Timing

Page 243 of 377

Floating Multiply-

Subtract Single

fmsubs[.] 59 28 FPU 1-1-1 —

Floating Multiply-

Subtract

fmsub[.] 63 28 FPU 2-1-1 —

Floating Multiply Single fmuls[.] 59 25 FPU 1-1-1 —

Floating Multiply fmul[.] 63 25 FPU 2-1-1 —

Floating Negative

Absolute Value

fnabs[.] 63 136 FPU 1-1-1 —

Floating Negate fneg[.] 63 40 FPU 1-1-1 —

Floating Negative

Multiply-Add Single

fnmadds[.] 59 31 FPU 1-1-1 —

Floating Negative

Multiply-Add

fnmadd[.] 63 31 FPU 2-1-1 —

Floating Negative

Multiply-Subtract Single

fnmsubs[.] 59 30 FPU 1-1-1 —

Floating Negative

Multiply-Subtract

fnmsub[.] 63 30 FPU 2-1-1 —

Floating Reciprocal

Estimate Single

fres[.] 59 24 FPU 2-1-1 —

Floating Round to

Single-Precision

frsp[.] 63 12 FPU 1-1-1 —

Floating Reciprocal

Square Root Estimate

frsqrte[.] 63 26 FPU 2-1-1 —

Floating Select fsel[.] 63 23 FPU 1-1-1 —

Floating Subtract Single fsubs[.] 59 20 FPU 1-1-1 —

Floating Subtract fsub[.] 63 20 FPU 1-1-1 —

Move to Condition

mcrfs 63 64 FPU 1-1-1 Execution

Move From FPSCR mffs[.] 63 583 FPU 1-1-1 Execution

Move To FPSCR Bit 0 mtfsb0

[.]63 70 FPU 3—

Move To FPSCR Bit 1 mtfsb1[.]63 38 FPU 3—

Move To FPSCR Field

Immediate

mtfsfi[.] 63 134 FPU 3 —

Move To FPSCR Fields mtfsf[.] 63 711 FPU 3 —

Table 6-8. Floating-Point Instructions (Page 2 of 2)

Instruction Mnemonic

Primary

Opcode

Extended

Opcode

Unit Cycles Serialization

Main Page

IBM PowerPC 750GX

Table of Contents

Related product manuals