Intel 1000BASE-T User Manual

10Base-T Transmitter Output Timing Jitter without Cable Model
1000BASE-T/100BASE-TX/10BASE-T Physical Layer Compliance Tests Manual
86 Intel Confidential
Figure 22-1. Test Setup for 10Base-T Transmitter Output Timing Jitter without Cable Model
2. From the 10 BASE-T PHY Configuration Tests menu in gigconf.exe, select the Jitter Without
Cable Model: 1411.10.13 test
3. Configure the oscilloscope according to the table below.
Differential Probe
w/ 1 GHz BW
Unit Under Test
(UUT)
Digitizing
Oscilloscope
Test Fixture 40-25
100 Ohm Resistive Load
RX
RJ-45
TX
Table 22-1. Scope Configuration for Peak Differential Output Voltage on TD Circuit
Scope Parameter Setting
Horizontal Scale 10 ns/division
Vertical Scale
-1.6 V to +1.6 V (at 10 vertical divisions, use
320 mV/division; at 8 divisions, 400 mV/division)
Trigger Type
Pulse width: ~220 ns (lower bound); ~320 ns (upper
bound)
Tight trigger (±10 ns of actual pulse width) is best.
Trigger Level Typically 0.5 V to 1.7 V
Display Persistence Infinite persistence
Pulse Width Triggering
Triggering information is provided to give a good starting point for measurement. The
following guidelines will help the tester achieve the most stable display.
1. Set the trigger level as specified in the above table.
2. Select pulse width triggering.
3. Set the upper bound parameter to approximately 400 ns and the lower bound
parameter to approximately 125 ns.
4. Set the trigger mode to normal.
5. Increase the lower bound parameter gradually until the triggering is lost.
6. Decrease the lower bound parameter slowly in 6 ns increments until triggering
resumes.
7. Decrease the upper bound parameter until it is 6 ns to 15 ns above the lower trigger
bound parameter.

Intel 1000BASE-T Specifications

General

Brand	Intel
Model	1000BASE-T
Category	Adapter
Language	English