Intel S1400FP - 7.2 Memory RAS Mode Select

Memory Subsystem
System Event Log Troubleshooting Guide for EPSD Platforms Based on Intel
®
Xeon
®
Processor E5 4600/2600/2400/1600/1400 Product Families
72 Intel order number G90620-002 Revision 1.1
7.2 Memory RAS Mode Select
Memory RAS Mode Select events are logged to record changes in RAS Mode.
When a RAS Mode selection is made that changes the RAS Mode (including selecting a RAS Mode from or to Independent Channel
Mode), that change is logged to SEL in a Memory RAS Mode Select event message, which records the previous RAS Mode (from)
and the newly selected RAS Mode (to). The event also includes an Offset value in ED1 which indicates whether the mode change
left the system with a RAS Mode active (Enabled), or not (Disabled – Independent Channel Mode selected).This sensor provides the
Spare Channel mode RAS Configuration status. Memory RAS Mode Select is an informational event.
Table 60: Memory RAS Mode Select Sensor Typical Characteristics
Byte
Field
Description
8
9
Generator ID
0001h = BIOS POST
11
Sensor Type
0ch = Memory
12
Sensor Number
12h
13
Event Direction and
Event Type
[7] Event direction
0b = Assertion Event
1b = Deassertion Event
[6:0] Event Type = 09h (digital Discrete)
14
Event Data 1
[7:6] – 10b = OEM code in Event Data 2
[5:4] – 10b = OEM code in Event Data 3
[3:0] – Event Trigger Offset
0h = RAS Configuration Disabled
1h = RAS Configuration Enabled
15
Event Data 2
Prior RAS Mode
[7:4] = Reserved
[3:0] = RAS Mode
0h = None (Independent Channel Mode)
1h = Mirroring Mode
2h = Lockstep Mode
4h = Rank Sparing Mode