Chapter 3 — Theory of Operation
50 CV30 Fixed Mount Computer Service Manual
The V12P0_CCFL is filtered from the V12P0 through a ferrite bead and
supplied to the high power CCFL Controller LT1768 at the Inverter board.
Subsequently this controller outputs high voltage to the LCD lamp.
V5P0_MAIN
V12P0 To V5P0_MAIN
The V5P0_MAIN is stepped down from V12P0 through MAX1745. This
power is an always ON plane that provides power to numerous power
distribution switches, an LDO, and a buck converter.
Main applications engaged by this source are the RS-232 Serial COM
power, USB host and hub power, Audio Speaker Amp power, and buck to
3.3 V for applications in addition to the graphic controller chip.
V3P3_AUX2, V3P3_USBH, and V3P3_LCD
V5P0_MAIN To V3P3_AUX2
The V3P3_AUX2 is stepped down from V5P0_MAIN through LT3411.
This 3.3 V power is an always ON plane that provides power to:
• RS-232 Transceiver MAX3243
• USB Hub ISP1520
• LCD Module LQ064V3DG01
V3P3_AUX2 To V3P3_USBH
The V3P3_USBH is the PFET controlled version of V3P3_AUX2 by the
signal USBH_PWR_EN. The signal is asserted by the CPU to allow the
power to the USB hub ISP1520.
V3P3_AUX2 To V3P3_LCD
The V3P3_LCD is the PFET controlled version of V3P3_AUX2 by the
signal ENCTL. The graphic controller asserted this signal to allow power
V3P3_LCD to the LCD module LQ064V3DG01.
V4P5
V5P0_MAIN To V4P5
The V4P5 is output from the ferrite filtered V3P3_AUX2 through an
LDO, which is controlled by the signal AUDIO_SPKR_AMP_PWR_EN.
The CPU asserts this signal to enable the LDO and the audio speaker AMP
TPA2005, hence V4P5 will be channel through a ferrite bead to this audio
speaker AMP.
V5P0_COM1 and V5P0_COM2
V5P0_MAIN To V5P0_COM1 and V5P0_COM2
Both the V5P0_COM1 and V5P0_COM2 are output from the
V5P0_MAIN through the two individual fixed current limit power
distribution switches MIC2015. The two switches are controlled by signal
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