Chapter 3 — Theory of Operation
CV30 Fixed Mount Computer Service Manual 55
• Over-discharge current. When discharge current exceeds 4.6 A, the
battery is internally disconnected.
The circuit board also contains a thermistor that provides a way to measure
the battery temperature to ensure the battery is only charged when its cell
temperature is between 0°C and 40°C (32°F and 104°F).
An internal charger automatically charges the backup battery within four
hours whenever external power is applied. If the backup battery fails,
resulting in critically low power, the amber LED on the top of the display
lights up. The backup battery can be replaced in the field by a qualified
service technician.
The protection circuitry inside the battery decides that the cell voltage has
reached a point at which further discharge will damage the cell and the
internal FETs turn off to prevent further discharge of the battery. The
battery can no longer provide power.
Power State Table
The system has the following basic power states:
1 Dead. This state occurs when nothing has power and the battery power
falls to end voltage. The unit will not have any power to do anything.
Data is only retained in non-volatile storage either in the persistent
memory of the processor or in the DOC.
2 Critical suspend/deep sleep. This state occurs when the external power
source is removed from the unit. When external power is removed, the
voltage detector asserts the nBATT_FAULT_DET to instruct the CPU
to perform the necessary task to store all current state data application
programs from the SDRAM to the flash. Upon completion, nSYS_EN
will be de-asserted to switch off certain power planes. The summary of
the power plane status at deep sleep is shown in the Power Plane Status
table on the next page. The external RTC remain powered by the
V3P3_MAIN processor at minimum function. SDRAM is in self-
refresh state. The current consumption at this state is approximately 5
mA.
3 Suspend/sleep. This state occurs when the keypad I/O button is
pressed and an external power source is present. At this time CPU will
de-assert the PWR_EN signal to switch off certain power planes. Refer
to the summary table for the power plane that will be OFF in Power
Plane Status table on the next page. Pressing the I/O button again will
wake up the unit from sleep. Majority of the system is powered down
but some options may be left on. SDRAM is in self-refresh state. The
suspend current is approximately 5mA.
4 Idle. In this state the processor is powered and the internal clock is
running but it is not executing any code. The SDRAM may be in auto
power down mode. All the power planes are ON with the presence of
the external power source.
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