Keithley 2002

To Next Page

To Previous Page

Troubleshooting

2-29

Bit patterns

Test 202.4 — Integration period bit I14

Type

Pass/Fail

Fault message Integration period bit I14

Description Integration time is set up with I14 and I0 high and all other I lines low. This test uses the same

circuit setup as test 202.1. A reading is acquired and compared to a calculated value based on

the previous reading.

Components Shift registers that set up the I15 through I0 levels, open or shorted lines components associated

with the I lines, or U816.

Drawing reference Analog Board; 2002-100

A/D Converter; 2002-160

Bit patterns

Bit pattern* Register

—U400—

01111011

—U811—

00001101

—U224—

00010111

—U432—

10000000

—U810—

01000000

—U206—

01110000

—U203—

10001110

—U411—

11111011

—U809—

00000001

—U207—

00001111

—U221—

11101001

—U406—

00000100

AD_STB

MUX_STB

R1_STB

R2_STB

*Bits associated with register IC terminals as follows:

QQQQQQQQ

87654321 87654321 87654321 87654321

IC pins: Q8=11, Q7=12, Q6=13, Q5=14, Q4=7, Q3=6, Q2=5, Q1=4.