LabJack U3 - Configtimerclock

5.2.4
Writes
• TimerClockConfig: Bit 7 determines whether the new TimerClockBase and
TimerClockDivisor are written, or if just a read is performed. Bits 0-2 specify the
TimerClockBase. If TimerClockBase is 3-6, then Counter0 is not available.
• TimerClockDivisor: The base timer clock is divided by this value, or divided by 256 if this
value is 0. Only applies if TimerClockBase is 3-6.
a
ConfigTimerClock
and read the timer clock configuration.
Comm nd:
Byte
0 m8
10xF8
x
Checksu
2002
4 ecksum16 (LSB)
5 Checksum16 (MSB)
6 Reserved
7 Reserved
8 TimerClockConfig
Bit 7: Configure the clock
Bits 2-0: TimerClockBase
b000: 4 MHz
b001: 12 MHz
b010: 48 MHz (Default)
b011: 1 MHz /Divisor
b100: 4 MHz /Divisor
b101: 12 MHz /Divisor
b110: 48 MHz /Divisor
9 TimerClockDivisor (0 = ÷256)
Response:
30x0A
Ch
Byte
0 Checksum8
10xF8
20x02
30x0A
4 Checksum16 (LSB)
5 Checksum16 (MSB)
6 Errorcode
7 Reserved
8 TimerClockConfig
9 TimerClockDivisor (0 = ÷256)
86