LG 42PW350 - X Board Layout Primary Circuit Diode Check

X Board Layout Primary Circuit Diode Check
The two X-Boards have similar circuit layouts for the connections going to the TCPs, as shown below.
3.3V
EC
Gnd
Pins 33~34
EC
Pins 47~48
EC
Pins 3~4
Logic
VA
Pins 6~7
VA
Pi
44 45
TCP
Pi
ns
44
~
45
-
On the below:
+
On the below:
All Connectors to Control and Z-SUB boards are disconnected from Left X board.
All readings are in Diode Mode from Chassis Ground
On any Va (0.45V) TCPs connected.
On EC (0.45V) TCPs connected.
On 3.3V (0.37V) TCPs connected.
On any Va (OL) TCPs disconnected.
On any Va (OL) TCPs connected.
On EC (OL) TCPs connected.
On 3.3V (1.22V) TCPs connected.
On any Va (OL) TCPs disconnected.
June 2011 42PW350 Plasma
129
On EC (OL) TCPs disconnected.
On 3.3V (OL) TCPs disconnected.
On EC (OL) TCPs disconnected.
On 3.3V (OL) TCPs disconnected.