Microchip Technology MPLAB ICD 5 User Manual

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User Guide
© 2023 Microchip Technology Inc. and its subsidiaries
DS-50003529B - 34
IDR/OCDR Events
The IDR (In-out Data Register) is also known as the OCDR (On-Chip Debug Register) and is used
extensively by the debugger to read and write information to the MCU when in Stopped mode
during a debug session. When the application program in Run mode writes a byte of data to the
OCDR register of the AVR device being debugged, the MPLAB ICD 5 reads this value out and displays
it in the message window of the software front-end. The OCDR register is polled every 50 ms, so
writing to it at a higher frequency will NOT yield reliable results. When the AVR device loses power
while being debugged, spurious OCDR events may be reported. This happens because the MPLAB
ICD 5 may still poll the device as the target voltage drops below the AVR’s minimum operating
voltage.
4.3.1.4 AVR XMEGA OCD Features
The AVR XMEGA OCD is otherwise known as PDI (Program and Debug Interface). Two physical
interfaces (JTAG and PDI physical) provide access to the same OCD implementation within the
device. It supports the following features:
• Complete program ow control
• Full access to all registers and memory areas
• One dedicated program address comparator or symbolic breakpoint (reserved)
• Four hardware comparators
• Unlimited number of user program breakpoints (using BREAK instruction)
• No limitation on system clock frequency
Note: For the ATxmegaA1 family, only revision G or later is supported.
4.3.1.4.1 AVR
®
XMEGA
®
Special Consideraons
OCD and Clocking
When the MCU enters Stopped mode, the OCD clock is used as MCU clock. The OCD clock is either
the JTAG TCK if the JTAG interface is being used, or the PDI_CLK if the PDI interface is being used.
I/O Modules in Stopped Mode
In contrast to earlier Microchip megaAVR devices, in XMEGA, the I/O modules are stopped in Stop
mode. This means that USART transmissions will be interrupted and timers (and PWM) will be
stopped.
Hardware Breakpoints
There are four hardware breakpoint comparators - two address comparators and two value
comparators. They have certain restrictions:
• All breakpoints must be of the same type (program or data).
• All data breakpoints must be in the same memory area (I/O, SRAM, or XRAM).
• There can only be one breakpoint if the address range is used.
Here are the dierent combinations that can be set:
• Two single data or program address breakpoints.
• One data or program address range breakpoint.
• Two single data address breakpoints with single value compare.
• One data breakpoint with address range, value range, or both.
MPLAB X IDE and Microchip Studio will tell you if the breakpoint cannot be set, and why. Data
breakpoints have priority over program breakpoints if software breakpoints are available.
JTAGEN Fuse
The JTAG interface is enabled using the JTAGEN fuse, which is programmed by default. This allows
access to the JTAG programming interface.

Microchip Technology MPLAB ICD 5 Specifications

General

Brand	Microchip Technology
Model	MPLAB ICD 5
Category	Microcontrollers
Language	English