Microchip Technology MPLAB ICD 5 User Manual

Operaon
User Guide
© 2023 Microchip Technology Inc. and its subsidiaries
DS-50003529B - 30
4. Operaon
A simplied theory of operation of the MPLAB ICD 5 In-Circuit Debugger system is provided here. It
is intended to provide enough information so that a target board can be designed that is compatible
with the debugger for both debugging and programming operations. The basic theory of in-circuit
debugging and programming is discussed so that problems, if encountered, are quickly resolved.
4.1 MPLAB X IDE Debugging
In the Project Properties window, set up debugging, programming or other options. See
9.2. Debugger Options Selection. Then debug your project
.
For details on how to debug an application with MPLAB X IDE, see the user’s guide on the MPLAB X
IDE webpage or the WebHelp version on onlinedocs.microchip.com/.
4.2 SAM and PIC32C Arm Devices - On-Chip Debugging
Both SAM and PIC32C microcontrollers are based on Arm
®
Cortex-M
®
core. Debug features available
depend on the type of core (see table below). Debug connectors support SWD and JTAG.
For more information on which devices have which cores, see 32-bit PIC
®
and SAM Microcontrollers
or your device data sheet. See also CoreSight documentation provided by Arm.
Table 4-1. Cortex-M Debug and Trace Support Summary
Cortex-M Types Debug Support
Cortex-M0+ Debug Optional: Basic debug functionality includes processor halt, single-step, processor core register
access, Reset and HardFault Vector Catch, unlimited software breakpoints, and full system memory access.
Also 1/2/3/4 breakpoint, and 1/2 watchpoint functionality.
Cortex-M23 Debug Optional: Basic debug functionality includes processor halt, single-step, processor core register
access, reset and HardFault Vector Catch, unlimited software breakpoints, and full system memory access.
Also 1/2/3/4 breakpoint, and 1/2/3/4 watchpoint functionality.
Cortex-M4, M4F Debug Optional: Basic debug functionality includes processor halt, single-step, processor core register
access, Vector Catch, unlimited software breakpoints, and full system memory access. Also various
breakpoint and 1/4 watchpoint functionality.
Cortex-M7 Cortex-M7 debug functionality includes processor halt, single-step, processor core register access, Vector
Catch, unlimited software breakpoints, and full system memory access. The processor also includes
support for 4/8 hardware breakpoints and 2/4 watchpoints congured during implementation.
4.3 AVR Devices - On-Chip Debugging (OCD)
An on-chip debug module is a system allowing a developer to monitor and control the execution on
a device from an external development platform, usually through a device known as a debugger or
debug adapter.
With an OCD system, the application can be executed while maintaining exact electrical and timing
characteristics in the target system, allowing you to stop execution conditionally or manually to
inspect program ow and memory.
Run Mode
When in Run mode, the execution of code is completely independent of the MPLAB ICD 5. The
MPLAB ICD 5 will continuously monitor the target device to see if a break condition has occurred.
When this happens, the OCD system will interrogate the device through its debug interface, allowing
the user to view the internal state of the device.
Stopped Mode
When a breakpoint is reached, the program execution is halted, but some I/O may continue to run
as if no breakpoint had occurred. For example, assume that a USART transmit has just been initiated
when a breakpoint is reached. In this case, the USART continues to run at full speed, completing the
transmission, even though the core is in Stopped mode.

Microchip Technology MPLAB ICD 5 Specifications

General

Brand	Microchip Technology
Model	MPLAB ICD 5
Category	Microcontrollers
Language	English