xii M68000 USER’S MANUAL MOTOROLA
LIST OF ILLUSTRATIONS
Figure Page
Number Title Number
2-1 User Programmer's Model ................................................................................... 2-2
2-2 Supervisor Programmer's Model Supplement ..................................................... 2-2
2-3 Supervisor Programmer's Model Supplement (MC68010) .................................. 2-3
2-4 Status Register .................................................................................................... 2-3
2-5 Word Organization In Memory............................................................................. 2-6
2-6 Data Organization In Memory .............................................................................. 2-7
2-7 Memory Data Organization (MC68008) ............................................................... 2-3
3-1 Input and Output Signals (MC68000, MC68HC000, MC68010).......................... 3-1
3-2 Input and Output Signals ( MC68HC001) ............................................................ 3-2
3-3 Input and Output Signals (MC68EC000) ............................................................. 3-2
3-4 Input and Output Signals (MC68008 48-Pin Version).......................................... 3-3
3-5 Input and Output Signals (MC68008 52-Pin Version).......................................... 3-3
4-1 Byte Read-Cycle Flowchart.................................................................................. 4-2
4-2 Read and Write-Cycle Timing Diagram................................................................ 4-2
4-3 Byte Write-Cycle Flowchart.................................................................................. 4-4
4-4 Write-Cycle Timing Diagram ................................................................................ 4-4
4-5 Read-Modify-Write Cycle Flowchart .................................................................... 4-6
4-6 Read-Modify-Write Cycle Timing Diagram........................................................... 4-7
5-1 Word Read-Cycle Flowchart ................................................................................ 5-2
5-2 Byte Read-Cycle Flowchart.................................................................................. 5-2
5-3 Read and Write-Cycle Timing Diagram................................................................ 5-3
5-4 Word and Byte Read-Cycle Timing Diagram ....................................................... 5-3
5-5 Word Write-Cycle Flowchart ................................................................................ 5-5
5-6 Byte Write-Cycle Flowchart.................................................................................. 5-5
5-7 Word and Byte Write-Cycle Timing Diagram ....................................................... 5-6
5-8 Read-Modify-Write Cycle Flowchart .................................................................... 5-7
5-9 Read-Modify-Write Cycle Timing Diagram........................................................... 5-8
5-10 CPU Space Address Encoding ............................................................................ 5-9
5-11 Interrupt Acknowledge Cycle Timing Diagram................................................... 5-10
5-12 Breakpoint Acknowledge Cycle Timing Diagram ............................................... 5-11
5-13 3-Wire Bus Arbitration Flowchart
(NA to 48-Pin MC68008 and MC68EC000 ........................................................ 5-12
5-14 2-Wire Bus Arbitration Cycle Flowchart ............................................................. 5-13
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