National Instruments sbRIO-9687 - Halt Signals

Table 31. Semikron Inverter Digital Signal Connections (Three-Phase Inverters)
Inverter Connector Signal (Semikron) Read/Write Inv. 0 Inv. 1
SKiiP 3 GD ERROR HB1 out R HALT0 HALT3
ERROR HB2 out R HALT1 HALT4
ERROR HB3 out R HALT2 HALT5
Overtemp out R GPIO0 GPIO5
Semikube SL GD IF_CMN_nHALT R/W HALT0 HALT5
IF_CMN_GPIO R GPIO0 GPIO5
Semikube GD IF_CMN_nHALT R/W HALT0 HALT5
Reserved R/W GPIO0 GPIO5
Halt Signals
The sbRIO-9687 HALT signals are bidirectional. Both ends of the signal line use a pull-up
resistor and a transistor for pull-down functionality. Both the controller and the inverter can set
or read the status of the signal line. The following diagram shows the HALT signal schematic.
Figure 17. HALT Signal Schematic
Vp
Write
Read
Inverter sbRIO-9687
Vp
DI
DO
To read the line status, set the corresponding sinking digital output to high; the logic level will
be read on the corresponding sourcing digital input. To write to the line, set the sinking digital
output to low or high.
The following table shows the mapping between inverter HALT signals and GPIC sourcing
DO and sinking DI.
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