Nvidia JETSON TX2 - Page 100

NVIDIA Jetson TX2/TX2i OEM Product Design Guide
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618 100
Pin #
Module Pin Name
Tegra Signal
Usage/Description
Usage on the Carrier
Board
Direction
Pin Type
E44
PEX0_TX+
PEX_TX4P
PCIe 0 Transmit+ (PCIe IF #0 Lane 0)
PCIe x4 Connector
Output
PCIe PHY, AC-Coupled on
carrier board
E45
PEX0_TX
PEX_TX4N
PCIe 0 Transmit (PCIe IF #0 Lane 0)
Output
E46
GND

GND
GND

GND
E47
GBE_LINK_ACT#

GbE RJ45 connector Link ACT (LED0)
LAN
Output
CMOS  3.3V tolerant
E48
GBE_MDI0+

GbE Transformer Data 0+
Bidir
MDI
E49
GBE_MDI0

GbE Transformer Data 0
Bidir
E50
PEX1_RST#
PEX_L2_RST_N
PCIe 1 Reset (PCIe IF #2)
M.2 Key E
Output
Open Drain 3.3V, Pull-up on
the module
F1
AUDIO_MCLK
AUD_MCLK
Audio Codec Master Clock
Expansion Header
Output
CMOS  1.8V
F2
GPIO19_AUD_RST
GPIO_AUD1
Audio Codec Reset or GPIO
Output
CMOS  1.8V
F3
SPI0_CS0#
GPIO_SEN4
SPI 0 Chip Select 0
Display Connector
Bidir
CMOS  1.8V
F4
SPI0_MOSI
GPIO_SEN3
SPI 0 Master Out / Slave In
Bidir
CMOS  1.8V
F5
I2S3_LRCLK
DAP4_FS
I2S Audio Port 3 Left/Right Clock
Camera Connector
Bidir
CMOS  1.8V
F6
I2S3_SDOUT
DAP4_DOUT
I2S Audio Port 3 Data Out
Bidir
CMOS  1.8V
F7
GPIO1_CAM1_PWR#
GPIO_CAM3
Camera 1 Powerdown or GPIO
Output
CMOS  1.8V
F8
CAM1_MCLK
EXTPERIPH2_CLK
Camera 1 Reference Clock
Output
CMOS  1.8V
F9
CAM0_MCLK
EXTPERIPH1_CLK
Camera 0 Reference Clock
Output
CMOS  1.8V
F10
GND

GND
GND

GND
F11
RSVD

Not used



F12
RSVD

Not used



F13
SPI1_MOSI
GPIO_CAM6
SPI 1 Master Out / Slave In
Expansion Header
Bidir
CMOS  1.8V
F14
SPI1_MISO
GPIO_CAM5
SPI 1 Master In / Slave Out
Bidir
CMOS  1.8V
F15
GND

GND
GND

GND
F16
SPI2_CS1#
GPIO_MDM4
SPI 2 Chip Select 1
Display/Camera Conns.
Bidir
CMOS  1.8V
F17
SDCARD_CD#
GPIO_EDP2
SD Card Card Detect
SD Card
Input
CMOS  1.8V
F18
SDCARD_D3
SDMMC1_DAT3
SD Card (or SDIO) Data 3
Bidir
CMOS  3.3/1.8V
F19
SDCARD_D2
SDMMC1_DAT2
SD Card (or SDIO) Data 2
Bidir
CMOS  3.3/1.8V
F20
SDCARD_WP
GPIO_EDP1
SD Card Write Protect
Input
CMOS  1.8V
F21
GND

GND
GND

GND
F22
CSI4_D0
CSI_E_D0_N
Camera, CSI 4 Data 0
Camera Connector
Input
MIPI D-PHY
F23
CSI4_D0+
CSI_E_D0_P
Camera, CSI 4 Data 0+
Input
F24
GND

GND
GND

GND
F25
CSI2_D0
CSI_C_D0_N
Camera, CSI 2 Data 0
Camera Connector
Input
MIPI D-PHY
F26
CSI2_D0+
CSI_C_D0_P
Camera, CSI 2 Data 0+
Input
F27
GND

GND
GND

GND
F28
CSI0_D0
CSI_A_D0_N
Camera, CSI 0 Data 0
Camera Connector
Input
MIPI D-PHY
F29
CSI0_D0+
CSI_A_D0_P
Camera, CSI 0 Data 0+
Input
F30
GND

GND
GND

GND
F31
DSI2_D0+
DSI_C_D0_P
Display, DSI 2 Data 0+
Display Connector
Output
MIPI D-PHY
F32
DSI2_D0
DSI_C_D0_N
Display, DSI 2 Data 0
Output
F33
GND

GND
GND

GND
F34
DSI0_D0+
DSI_A_D0_P
Display, DSI 0 Data 0+
Display Connector
Output
MIPI D-PHY
F35
DSI0_D0
DSI_A_D0_N
Display, DSI 0 Data 0
Output
F36
GND

GND
GND

GND
F37
DP0_TX1
HDMI_DP0_TXDN1
DisplayPort 0 Lane 1 or HDMI Lane 1
Display Connector
Output
AC-Coupled on carrier
board
F38
DP0_TX1+
HDMI_DP0_TXDP1
DisplayPort 0 Lane 1+or HDMI Lane 1+
Output
F39
GND

GND
GND

GND
F40
PEX2_RX+
PEX_RX3P
PCIe 2 Receive+ (PCIe IF #0 Lane 2 or
PCIe IF #1 Lane 0)
PCIe x4 Connector
Input
PCIe PHY, AC-Coupled on
carrier board
F41
PEX2_RX
PEX_RX3N
PCIe 2 Receive (PCIe IF #0 Lane 2 or
PCIe IF #1 Lane 0)
Input
F42
GND

GND
GND

GND
F43
USB_SS0_RX+
PEX_RX0P
USB SS 0 Receive+ (USB 3.0 Port #0
muxed w/PCIe #2 Lane 0)
USB 3.0 Type A
Input
USB SS PHY, AC-Coupled
(off the module)
F44
USB_SS0_RX
PEX_RX0N
USB SS 0 Receive (USB 3.0 Port #0
muxed w/PCIe #2 Lane 0)
Input
F45
GND

GND
GND

GND
F46
GBE_LINK1000#

GbE RJ45 connector Link 1000 (LED2)
LAN
Output
CMOS  3.3V Tolerant
F47
GBE_MDI1+

GbE Transformer Data 1+
Bidir
MDI
F48
GBE_MDI1

GbE Transformer Data 1
Bidir
F49
GND

GND
GND

GND
F50
GBE_LINK100#

GbE RJ45 connector Link 100 (LED1)
LAN
Output
CMOS  3.3V Tolerant
G1
I2S0_SDIN
DAP1_DIN
I2S Audio Port 0 Data In
Expansion Header
Input
CMOS  1.8V