Nvidia JETSON TX2 - Page 101

NVIDIA Jetson TX2/TX2i OEM Product Design Guide
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618 101
Pin #
Module Pin Name
Tegra Signal
Usage/Description
Usage on the Carrier
Board
Direction
Pin Type
G2
I2S0_CLK
DAP1_SCLK
I2S Audio Port 0 Clock
Bidir
CMOS  1.8V
G3
GND

GND
GND

GND
G4
DSPK_OUT_CLK
GPIO_AUD3
Digital Speaker Output Clock
GPIO Expansion
Header
Output
CMOS  1.8V
G5
I2S2_CLK
DMIC2_DAT
I2S Audio Port 2 Clock
M.2 Key E
Bidir
CMOS  1.8V
G6
I2S2_SDIN
DMIC1_DAT
I2S Audio Port 2 Data In
Input
CMOS  1.8V
G7
GPIO4_CAM_STROBE
GPIO_SEN5
Camera Strobe or GPIO
Camera Connector
Output
CMOS  1.8V
G8
GPIO0_CAM0_PWR#
QSPI_SCK
Camera 0 Powerdown or GPIO
Output
CMOS  1.8V
G9
UART3_CTS#
UART4_CTS_N (via
mux)
UART 3 Clear to Send
Not assigned
Input
CMOS  1.8V
G10
UART3_RTS#
UART4_RTS_N (via
mux)
UART 3 Request to Send
Output
CMOS  1.8V
G11
UART0_RTS#
UART1_RTS
UART 0 Request to Send
Debug Header
Output
CMOS  1.8V
G12
UART0_RX
UART1_RX
UART 0 Receive
Input
CMOS  1.8V
G13
SPI1_CLK
GPIO_CAM4
SPI 1 Clock
Expansion Header
Bidir
CMOS  1.8V
G14
GPIO9_MOTION_INT
CAN_GPIO2
Motion Interrupt or GPIO
Camera Conn & Exp.
Hdr.
Input
CMOS  1.8V
G15
SPI2_MOSI
GPIO_WAN7
SPI 2 Master Out / Slave In
Display/Camera Conns.
Bidir
CMOS  1.8V
G16
SPI2_CS0#
GPIO_WAN8
SPI 2 Chip Select 0
Bidir
CMOS  1.8V
G17
GND

GND
GND

GND
G18
SDCARD_CLK
SDMMC1_CLK
SD Card (or SDIO) Clock
SD Card
Output
CMOS  3.3/1.8V
G19
SDCARD_CMD
SDMMC1_CMD
SD Card (or SDIO) Command
Bidir
CMOS  3.3/1.8V
G20
GND

GND
GND

GND
G21
CSI4_CLK
CSI_E_CLK_N
Camera, CSI 4 Clock
Camera Connector
Input
MIPI D-PHY
G22
CSI4_CLK+
CSI_E_CLK_P
Camera CSI 4 Clock+
Input
G23
GND

GND
GND

GND
G24
CSI2_CLK
CSI_C_CLK_N
Camera, CSI 2 Clock
Camera Connector
Input
MIPI D-PHY
G25
CSI2_CLK+
CSI_C_CLK_P
Camera, CSI 2 Clock+
Input
G26
GND

GND
GND

GND
G27
CSI0_CLK
CSI_A_CLK_N
Camera, CSI 0 Clock
Camera Connector
Input
MIPI D-PHY
G28
CSI0_CLK+
CSI_A_CLK_P
Camera, CSI 0 Clock+
Input
G29
GND

GND
GND

GND
G30
DSI2_CLK+
DSI_C_CLK_P
Display DSI 2 Clock+
Display Connector
Output
MIPI D-PHY
G31
DSI2_CLK
DSI_C_CLK_N
Display DSI 2 Clock
Output
G32
GND

GND
GND

GND
G33
DSI0_CLK+
DSI_A_CLK_P
Display, DSI 0 Clock+
Display Connector
Output
MIPI D-PHY
G34
DSI0_CLK
DSI_A_CLK_N
Display, DSI 0 Clock
Output
G35
GND

GND
GND

GND
G36
DP0_TX2
HDMI_DP0_TXDN0
DisplayPort 0 Lane 2 or HDMI Lane 0
Display Connector
Output
AC-Coupled on carrier
board
G37
DP0_TX2+
HDMI_DP0_TXDP0
DisplayPort 0 Lane 2+ or HDMI Lane 0+
Output
G38
GND

GND
GND

GND
G39
PEX_RFU_RX+
PEX_RX1P
PCIe RFU Receive+ (PCIe IF #0 Lane 3 or
USB 3.0 Port #1)
PCIe x4 Connector
Input
PCIe PHY, AC-Coupled on
carrier board
G40
PEX_RFU_RX
PEX_RX1N
PCIe RFU Receive (PCIe IF #0 Lane 3 or
USB 3.0 Port #1)
Input
G41
GND

GND
GND

GND
G42
USB_SS1_RX+
PEX_RX2P
USB SS 1 Receive+ (USB 3.0 Port #2 or
PCIe IF #0 Lane 1)
PCIe x4 Connector
Input
USB SS PHY, AC-Coupled
(off the module)
G43
USB_SS1_RX
PEX_RX2N
USB SS 1 Receive (USB 3.0 Port #2 or
PCIe #0 Lane 1)
Input
G44
GND

GND
GND

GND
G45
SATA_RX+
PEX_RX5P
SATA Receive+
SATA Connector
Input
SATA PHY, AC-Coupled on
carrier board
G46
SATA_RX
PEX_RX5N
SATA Receive
Input
G47
GND

GND
GND

GND
G48
GBE_MDI2+

GbE Transformer Data 2+
LAN
Bidir
MDI
G49
GBE_MDI2

GbE Transformer Data 2
Bidir
G50
GND

GND
GND

GND
H1
I2S0_LRCLK
DAP1_FS
I2S Audio Port 0 Left/Right Clock
Expansion Header
Bidir
CMOS  1.8V
H2
I2S0_SDOUT
DAP1_DOUT
I2S Audio Port 0 Data Out
Bidir
CMOS  1.8V
H3
GPIO20_AUD_INT
GPIO_AUD0
Audio Codec Interrupt or GPIO
Input
CMOS  1.8V
H4
DSPK_OUT_DAT
GPIO_AUD2
Digital Speaker Output Data
GPIO Expansion
Header
Output
CMOS  1.8V
H5
I2S2_LRCLK
DMIC1_CLK
I2S Audio Port 2 Left/Right Clock
M.2 Key E
Bidir
CMOS  1.8V