Nvidia JETSON TX2 - Page 97

NVIDIA Jetson TX2/TX2i OEM Product Design Guide
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618 97
Pin #
Module Pin Name
Tegra Signal
Usage/Description
Usage on the Carrier
Board
Direction
Pin Type
B32
SDIO_D0
SDMMC3_DAT0
SDIO Data 0
SDIO
Bidir
CMOS  1.8V
B33
HDMI_CEC
HDMI_CEC
HDMI CEC
HDMI Type A Conn.
Bidir
Open Drain, 3.3V
B34
DP0_AUX_CH
DP_AUX_CH0_N
Display Port 0 Aux or HDMI DDC SDA
Display Connector
Bidir
AC-Coupled on Carrier
Board (eDP/DP) or Open-
Drain, 1.8V (3.3V tolerant -
DDC/I2C)
B35
DP0_AUX_CH+
DP_AUX_CH0_P
Display Port 0 Aux+ or HDMI DDC SCL
Bidir
B36
DP0_HPD
DP_AUX_CH0_HPD
Display Port 0 Hot Plug Detect
Input
CMOS  1.8V
B37
USB0_VBUS_DET
UART5_CTS
USB 0 VBUS Detect
USB 2.0 Micro AB
Input
USB VBUS, 5V
B38
GND

GND
GND

GND
B39
USB0_D+
USB0_DP
USB 2.0 Port 0 Data+
USB 2.0 Micro AB
Bidir
USB PHY
B40
USB0_D
USB0_DN
USB 2.0 Port 0 Data
Bidir
B41
GND

GND
GND

GND
B42
USB2_D+
USB2_DP
USB 2.0, Port 2 Data+
M.2 Key E
Bidir
USB PHY
B43
USB2_D
USB2_DN
USB 2.0, Port 2 Data
Bidir
B44
GND

GND
GND

GND
B45
PEX1_REFCLK+
PEX_CLK3P
PCIe 1 Reference Clock+ (PCIe IF #2)
M.2 Key E
Output
PCIe PHY
B46
PEX1_REFCLK
PEX_CLK3N
PCIe 1 Reference Clock (PCIe IF #2)
Output
B47
GND

GND
GND

GND
B48
SYS_WAKE#
POWER_ON
Power button & SC7 wake interrupt
Power/SC7 wake
Input
CMOS  1.8V
B49
MOD_PWR_CFG_ID

Module power configuration
identification. Tied to GND on Jetson
TX2i. Floating on Jetson TX2.
Determines the power-on mechanism
used to support both Jetson TX2 & TX2i.
Module power
configuration ID
Output
VDD_IN level
B50
POWER_BTN#
POWER_ON / (PMIC
EN0)
Power Button. Used to initiate a system
power-on. Connected to PMIC EN0
-up to
VDD_5V0_SYS. Also connected to Tegra
POWER_ON pin through Diode with
-up to VDD_1V8_AP near
Tegra.
System
Input
CMOS  5.0V (see note 3)
C1
VDD_IN


Main power  Supplies PMIC & external
supplies
Main DC input
Input
5.5V-19.6V (TX2)
9.0V-19.0V (TX2i)
C2
VDD_IN
C3
GND

GND
GND

GND
C4
GND

GND
GND

GND
C5
RSVD

Not used



C6
I2C_CAM_CLK
CAM_I2C_SCL
Camera I2C Clock
Camera Connector
Bidir
Open Drain  1.8V
C7
BATLOW#
(PMIC_GPIO6)
Battery Low (PMIC GPIO)
System
Input
CMOS  1.8V
C8
BATT_OC
BATT_OC
Battery Over-current (& Thermal)
warning
Bidir
CMOS  1.8V
C9
WDT_TIME_OUT#
GPIO_SEN7
Watchdog Timeout
Input
CMOS  1.8V
C10
I2C_GP2_DAT
GEN7_I2C_SDA
General I2C 2 Data
I2C (General)
Bidir
Open Drain  1.8V
C11
I2C_GP2_CLK
GEN7_I2C_SCL
General I2C 2 Clock
Bidir
Open Drain  1.8V
C12
I2C_GP3_CLK
GEN9_I2C_SCL
General I2C 3 Clock
Bidir
Open Drain  1.8V
C13
I2C_GP3_DAT
GEN9_I2C_SDA
General I2C 3 Data
Bidir
Open Drain  1.8V
C14
I2S1_SDIN
DAP2_DIN
I2S Audio Port 1 Data In
GPIO Expansion
Header
Input
CMOS  1.8V
C15
I2S1_CLK
DAP2_SCLK
I2S Audio Port 1 Clock
Bidir
CMOS  1.8V
C16
FAN_PWM
GPIO_SEN6
Fan PWM
Fan
Output
CMOS  1.8V
C17
CAN1_STBY
CAN_GPIO6
CAN 1 Standby
GPIO Expansion
Header
Output
CMOS 3.3V
C18
CAN1_TX
CAN1_DOUT
CAN 1 Transmit
Output
CMOS 3.3V
C19
CAN1_ERR
CAN_GPIO3
CAN 1 Error
Input
CMOS 3.3V
C20
CAN_WAKE
CAN_GPIO4
CAN Wake
Input
CMOS 3.3V
C21
GND

GND
GND

GND
C22
CSI5_D0
CSI_F_D0_N
Camera, CSI 5 Data 0
Camera Connector
Input
MIPI D-PHY
C23
CSI5_D0+
CSI_F_D0_P
Camera, CSI 5 Data 0+
Input
C24
GND

GND
GND

GND
C25
CSI3_D0
CSI_D_D0_N
Camera, CSI 3 Data 0
Camera Connector
Input
MIPI D-PHY
C26
CSI3_D0+
CSI_D_D0_P
Camera, CSI 3 Data 0+
Input
C27
GND

GND
GND

GND
C28
CSI1_D0
CSI_B_D0_N
Camera, CSI 1 Data 0
Camera Connector
Input
MIPI D-PHY
C29
CSI1_D0+
CSI_B_D0_P
Camera, CSI 1 Data 0+
Input
C30
GND

GND
GND

GND
C31
DSI3_D0+
DSI_D_D0_P
Display, DSI 3 Data 0+
Display Connector
Output
MIPI D-PHY
C32
DSI3_D0
DSI_D_D0_N
Display, DSI 3 Data 0
Output