Quectel FC64E - Sw_Ctrl; RF Antenna Interfaces

Wi-Fi&Bluetooth Module Series
FC64E_Hardware_Design
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Figure 10: Requirements of WLAN_SLP_CLK
Table 12: Parameter of WLAN_SLP_CLK
3.7.2. SW_CTRL*
SW_CTRL can be used to control external VDD_RF power supply chip. The following table shows the pin
definition of SW_CTRL.
Table 13: Pin Definition of SW_CTRL
3.8. RF Antenna Interfaces
This information will be included in future revisions of this document.
Parameter
Comments
Min
Typ
Max
Unit
t(xoh)
Sleep-clock logic high
4.58
4.58
25.94
μs
t(xol)
Sleep-clock logic low
4.58
4.58
25.94
μs
T
Sleep-clock period
30.5208
μs
F
Sleep-clock frequency
(F = 1/T)
32.7645
kHz
Vpp
Peak-to-peak voltage
1.8
V
Pin Name
Pin No.
I/O
Description
Comment
SW_CTRL
23
DO
VDD_RF control
1.8 V power domain.
Active high.
If unused, keep this pin open.