Renesas RZ/A Series - Page 40

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications
R20UT4398EJ0100 Rev.1.00 2-22
2018.10.11
Table 2.3.5 Bus State Controller Settings (SDRAM read/write) (2)
User region
Target device
Bus state controller settings
CS3
IS42S16320F-7TL
■ AC characteristics adjustment register (ACADJ)
・Initial setting: H'0000 0000
・Recommended setting: H'0000 000A
- Output characteristics adjustment bit:
SDRODLY = B’0000; Does not delay output delay time
- Input characteristics adjustment bit:
SDRIDLY = B’1010; Delays input data import timing