Renesas RZ/A Series - NAND Flash Memory Interface

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications
R20UT4398EJ0100 Rev.1.00 2-23
2018.10.11
2.3.2 NAND Flash Memory Interface
RTK79210XXB00000BE is possible to mount NAND flash memory x 1 shown in Table 2.3.6 on the board pattern.
NAND flash memory control is performed by the RZ/A2M on-chip NAND flash controller (FLCTL).
Figure 2.3.2 shows NAND flash memory interface block diagram, and Table 2.3.7 shows the function settings of the
system setting DIP switches SW6-5 and SW6-6.
Table 2.3.6 NAND Flash Memory Overview
Model name
Bus size
Capacity
Access time
S34ML01G100TFI000
8 bit
128 MBytes
(8 bit x 128 M word)
Random: 25 s (max.)
Sequential: 25 ns (min.)
Figure 2.3.2 NAND Flash Memory Interface Block Diagram
PK_4
14
PK_0
PK_3
P3_4
PK_2
P3_1
P3_2
P3_5
P3_3
PK_1
PH_5
Ether2 / NAND（U14）
Ether2 / NAND（U17）
Ether2 / NAND（U19）
FWE
FRE
FRB
FALE
14
11
To EthernetPHY2
P3_3
P3_2
P3_4
P3_1
PK_1
PH_5
PK_0
P3_5
PK_2
PK_3
NAND flash memory（U31）
NAF[7:0]
FCE
CE#
I/O[7:0]
FALE
FRE
FCLE
FRB
ALE
CLE
RE#
R/B
3.3V
FWE
WE#
WP#
3.3V
PK_4
NAF1
PJ_7
PJ_6
RZ/A2M (U1)
PK_4 / ET1_RXD0/RMII1_RXD0 /
NAF7
P3_5 / ET1_RXD1/RMII1_RXD1 /
FCLE
P3_1 / ET1_RXER/RMII1_RXER /
FALE
P3_2 / ET1_CRS/RMII1_CRSDV /
FRE
P3_3 / ET1_MDC / FWE
P3_4 / ET1_MDIO / FRB
PK_1 / ET1_TXD0/RMII1_TXD0 /
NAF4
PK_3 / ET1_RXCLK/REF50CK1 /
NAF6
PH_5 / NAF2 / ET1_EXOUT
PK_2 / ET1_TXD1/RMII1_TXD1 /
NAF5
PK_0 / ET1_TXEN/RMII1_TXDEN /
NAF3
PK_5 / NAF1
PJ_7 / NAF0 / LCD0_EXTCLK
PJ_6 / FCE / LCD0_CLK
LCD / NAND（U15）
PJ_6
PJ_7
MUXOE# S
4A
4B1
4B2
3A
3B1
3B2
2A
2B1
2B2
1A
1B1
1B2
NAF3
NAF2
NAF4
FCLE
MUXOE# S
4A
4B1
4B2
3A
3B1
3B2
2A
2B1
2B2
1A
1B1
1B2
NAF7
NAF6
NAF5
MUXOE# S
3A
3B1
3B2
2A
2B1
2B2
1A
1B1
1B2
FCE
NAF0
2
To LCD I/F
3.3V
3.3V
MUXOE# S
2A
2B1
2B2
1A
1B1
1B2
3.3V
DIP
SW6-6
3.3V
OFF
3.3V
3.3V
NAF1
Note: Red text indicates a function used.
：Indicates a function not implemented.
：indicates a SUB board.
ON(L):A=B1, OFF(H):A=B2
DIP
SW6-5
OFF
3.3V