Renesas RZ/A Series - LAN Interface

RZ/A2M SUB Board RTK79210XXB00000BE 2. Function specifications
R20UT4398EJ0100 Rev.1.00 2-36
2018.10.11
2.13 LAN Interface
RTK79210XXB00000BE is equipped with Realtek Ethernet PHY RTL8201FL-VB-CG × 2, which can communicate
with the channel 0 and channel 1 of the RZ/A2M on-chip ethernet controller (ETHERC).
The Ethernet PHY incorporates the Wake-On-Lan (WOL) functionality, and outputs a WOL signal when a Magic
Packet has been detected, allowing the deep standby mode of RZ/A2M to be canceled.
Figure 2.13.1 shows the LAN interface (channel 0) block diagram, Figure 2.13.2 shows the LAN interface (channel 1)
block diagram, Table 2.13.1 shows the RZ/A2M CPU board port L function switching table, Table 2.13.2 shows the
function setting table of DIP switch SW6-4 for system setting, Table 2.13.3 and Table 2.13.5 show the function setting
table of jumper JP1, and Table 2.13.4 shows the function setting table of DIP switch SW6-5 for system setting.
Table 2.13.1 RZ/A2M CPU Board Port L Function Switching Table
Pin
Function
High
Low
PD_0
PL_[3 :0] is used as system setting pin.
Use PL_[3 :0] is used as RQ input pin.
[Note] indicates setting functions.