Sage II - User Manual

Describes the POWER-UP (OR BOOT) TEST, residing in PROMS for self-test.

A system exerciser that tests major components repeatedly for performance.

Determines if a floppy disk drive is misaligned using step-by-step instructions.

Used with a cleaning kit to clean floppy drive heads, often for dirt buildup.

A list of error messages and their meanings for troubleshooting.

Lists available diagnostic software, manuals, diskettes, and cleaning kits.

Lists necessary tools like screwdrivers and safety gear like anti-static mats.

Instructions for safely handling circuit boards, emphasizing anti-static precautions.

Guidelines for handling chips, stressing the use of anti-static mats and grounding.

Procedures for handling disk drives, including proper gripping and storage.

Specific handling differences for Micropolis disk drives.

Describes the diagnostic software shipped on two diskettes, 80 and 40 track.

How to test a system with both 80 and 40 track drives using SAGEUTIL.

Steps for initial system power-up and LED status interpretation.

Procedures for inserting the boot diskette and identifying common boot errors.

Steps to resolve problems when drives fail to boot the system correctly.

Specifies acceptable DC voltage ranges for checking the power supply.

Instructions for applying a dummy load to the power supply for testing.

Guidance on adjusting power supply voltages and when to replace it.

Methods to identify shorts on boards using voltage measurements.

Steps to disconnect power and remove back panel screws.

Procedures for removing the circuit board and its fastenings.

Steps to disconnect the power connector and remove the power supply unit.

Instructions for installing the new power supply in reverse order.

Explains the power-up routine as a diagnostic aid for troubleshooting.

Details PROM versions and their memory addresses, including reset behavior.

Describes the initialization tests and how they can be repeated.

Details the process of testing all RAM memory, including error reporting.

Explains how the system boots from diskette, including switch settings and error messages.

Describes monitor commands for hardware troubleshooting, like ERx and EFx.

Lists ROM program versions with additional diagnostics controlled by GROUP A switches.

Provides general hints for troubleshooting a "dead" system, focusing on common faulty components.

Lists common ICs on the CPU board that do not affect the sign-on message.

Details how to check the 8 MHz clock signal using an oscilloscope.

Explains how to check the AS+ signal on the address strobe line.

Instructions for checking the 64 KHz refresh signal and related components.

How to check RAM signals, focusing on the data bus interface.

Step-by-step guide for removing and replacing the computer board.

Outlines general guidelines for checking temperature sensitivity using heat and freeze spray.

Suggests checking RAM for intermittent failures and isolating faulty modules.

Inspects cables and connectors for proper seating and condition.

Checks chip seating and examines solder connections for potential issues.

Advises checking capacitors, particularly for voltage rating and replacement.

Recommends using the temperature test for chips that might be sensitive.

Describes CYCLER as a system performance test for diagnostics and validation.

Lists the specific tests performed by CYCLER, including RAM, Disk Drives, and Ports.

Lists required equipment for running the CYCLER test, including diskettes and printer.

Step-by-step guide for operating the CYCLER test, including setup and execution.

Explains how test results and errors are displayed and selected for review.

Describes the graph option for plotting selected disk errors versus test passes.

Details hard, soft, and data errors for drive #4, including cylinder and head specific data.

Details hard, soft, and data errors for drive #5, including cylinder and head specific data.

Describes the floppy drive test procedure, including format and operations.

Lists common hard I/O errors encountered during floppy drive testing.

Explains soft errors, their tracking by head/cylinder, and media importance.

Defines data errors as mismatches when hard/soft errors are not present.

Importance of formatting scratch diskettes on a known working system.

Checks floppy drive strapping options for correct system configuration.

Reads and displays DIP switch positions for system boot configuration.

Checks timing hardware registers and BIOS interrupt structure for timeouts.

Checks system timer registers against RAM test duration for clock accuracy.

Lists necessary source files and steps to assemble and link the CYCLER program.

Describes how to run the CLEANER program to clean disk drive heads.

Lists the source file and steps to compile and transfer the CLEANER program.

Explains the ALIGN test for determining floppy disk alignment and its limitations.

Steps to boot the SAGE, select ALIGN, and insert the diagnostic diskette.

Options for testing drives, displaying results, printing, repeating, or exiting.

Shows how to display the results of the last alignment test performed.

Explains how to send alignment test results to a printer or output file.

Allows repeating the alignment test for a specified number of passes.

Sets the output destination for alignment test results, either printer or file.

Writes the current menu screen to a file or device for saving parameters.

Saves test results to a file, asking for disk model and type.

Details the two types of data field patterns used on the Diagnostic Diskette.

Describes PATTERN 1 for alignment testing, focusing on track centerlining and eccentricity.

Describes PATTERN 2 for alignment testing, focusing on radial displacement from the centerline.

Reserves space for a third alignment pattern, currently undefined.

Lists necessary source files and steps to compile and transfer the ALIGN program.

Steps for disconnecting power, removing screws, cables, and circuit board.

Steps to remove the drive shield, disconnect cables, and remove drive mounting screws.

Instructions for sliding the new drive out and installing it.

Describes modifications for Micropolis disk drives, including jumper and SIP resistor pack.

Details setup for Micropolis disk drives, including shorting blocks and SIP resistor pack.

Notes that there are no modifications for Mitsubishi disk drives.

Describes resistor pullup straps for Mitsubishi drives closest to the CPU.

Details Tandon disk modifications involving jumper wires and resistor placement.

Explains how strapping blocks determine drive number for Tandon drives.

Notes no modifications are required for TEAC disk drives.

Describes resistor pack removal and jumper placement for TEAC drive setup.

Instructions for modifying power for 220V operation by removing a jumper.

Wiring details for terminal cables, including color coding and dummy pins.

Wiring for multiuser terminal cables, specifying pin usage and dummy pins.

Wiring for Intex Talker cables, detailing color coding and pin assignments.

Wiring for TI serial printer cables, including color coding and pin assignments.

Wiring for Qume serial printer cables, specifying pin usage and dummy pins.

Wiring for Diablo serial printer cables, detailing color coding and pin assignments.

Wiring details for parallel printer cables, including connector pinouts and assembly.

Description of the MC68000 microprocessor and its address/data line buffering.

Details the Sage interface bus (J1 and J2) and its signal assignments.

Explains the circuit driving the processor LED and its behavior.

Describes the interrupt priority level decoder circuit.

Explains processor outputs defining processing state classification.

Details the reset circuit, including the reset switch and its effect on the processor.

Explains the flip-flop circuit for enabling ROMs and disabling RAM during boot.

Describes the DTACK- generation circuit for read/write cycle completion.

Details the watch dog timer circuit for detecting bus timeouts and generating bus errors.

Discusses ROM sockets and their configuration options for various memory sizes.

Overviews page 2 of schematics, covering clock generation, I/O ports, and address decoding.

Explains the crystal oscillator and frequency division for system clocks.

Describes how address lines are decoded to generate chip select signals for ROM and I/O.

Explains buffering of address lines for counters and I/O ports.

Details I/O port chip selects and their functions, including tables.

Describes I/O devices connected via U56 and how the I/O bus direction is determined.

Details the 8255A peripheral interface chip and its configuration for input/output.

Explains the 8259 interrupt controller and its interaction with the processor.

Describes the use of 8253-5 programmable interval timers for baud rates and clocks.

Overviews page 3 of schematics, covering RAM parity, refresh, and control.

Details the parity error interrupt generation circuit.

Explains how address lines select memory banks using decoding logic.

Describes the arbitration process for memory refresh cycles.

Details the sequence of events for memory address cycles and refresh.

Explains signals generated for RAM control, including write enable and data bus control.

Describes how bus errors occur for non-existent memory locations and recovery.

Overviews page 4 of schematics, covering RAM addressing and control.

Maps RAM schematic arrangement to physical parts placement and banks.

Details multiplexed address lines and write enable signals for RAM.

Explains the parity generators/checkers and their role in parity error detection.

Overviews page 5 of schematics, focusing on the floppy disk controller.

Describes the NEC 765 controller chip and its interface to the floppy disk.

Explains how write clocks for floppy drives are generated.

Overviews page 6 of schematics, covering communication circuits and ports.

Details the RS232 serial terminal port implementation using the 8251A chip.

Details I/O port chip selects and their functions, including tables.

Describes the second serial port and its implementation using 8251A U58.

Explains the parallel printer port implementation using the 8255A chip.

Details the IEEE 488 interface, including TMS9914 GPIB adapter.

Lists BIOS channel error codes returned for Initialize, Read, Write, and Status commands.

Discusses boot errors, including aborted drives and drive error codes.

Refers to Terminal Problems for CRT display issues.

Explains LED blinking during boot and test completion.

Indicates processor status when LED is green, possibly stuck in a loop.

Describes LED red status on boot, indicating system problems.

Explains errors when a boot diskette lacks a boot program or the drive is faulty.

Discusses issues with terminal output and system startup, suggesting chip or power supply failure.

Addresses terminal issues like no text or garbage text, often due to configuration or cable problems.

Covers errors caused by software problems, including Bus Error and its types.

Explains bus errors from addressing non-existent memory and invalid addresses.

Describes errors from undefined opcodes or addressing modes.

Covers errors from division by zero or CHK/TRAPV instructions.

User attempting instructions requiring supervisor mode.

TRAP locations reserved by Motorola for future use.

Unassigned TRAP locations used by the Debugger or BIOS.

Auto-interrupt vectors not assigned by the debugger.

Errors caused by RAM parity chip or faulty RAM, with troubleshooting tips.

Errors related to TRAP handler or supervisor stack issues.

Explains the meaning of execution error codes, from system errors to bad blocks.

States that PROM and BIOS changes are documented in the RELEASE notes.

Lists different part numbers for SAGE II CPU board versions.

Details modifications made to CB0000 to match CB0001 electrically.

Details modifications made to CB0001, including silkscreen errors and CTS layout changes.

Explains the use of different U42 DELAY lines and modifications made.

Describes changes to lids, drives shields, power shields, and mechanics over time.

Notes about fan usage and lubrication for mechanical longevity.