S5-100U Addressing
Time-Controlled Program Processing
Access to the interrupt PII is expressed by the “PB” or “PW” operand identifiers in a statement in
the time-controlled program.
The letter “L” represents the “Load” operation (see chapter 8).
Figure 6-10. Accesses to the Interrupt PII
L PW 76
• Byte-by-byte reading “PB <byte address>”
Example: Reading in the signal states of all
channels of an 8-channel digital input module
in slot 21
• Word-by-word reading “PW <word address>”
Example: Reading in the analog value of
channel 2 of a 4-channel analog input module
in slot 1
Interrupt PII
Byte 21
Byte 76
Byte 77
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
High byte
015
L PB/PY* 21
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
a
ACCU 1
Low byte
015
ACCU 1
High byte Low byte
* depending on the programmer you have
Interrupt-Driven Program Processing
• When a process interrupt occurs, only the data of the interrupt inputs, slots 0 and 1, is read into
the interrupt PII.
• Only this data of the interrupt PII is available to the interrrupt-driven program for evaluation.
• In a statement in the interrrupt-driven program, access to the interrupt PII is possible only with
the following operands: PB0, PB1, and PW0.
• If other parameters are specified, the CPU goes into the STOP mode and the “NNN” error
message is specified in the ISTACK. See section 5.2.
EWA 4NEB 812 6120-02
6-13
To Next Page
Loading...
