Description: For PROFIBUS/PROFINET:
1st + 2nd byte indicate the logical start address of the I/O slot on the PROFIBUS/
PROFINET:
Value 0000 means NO active slot
Values 0001..0100 are reserved for the PLC process image (the value of input slots can
be
read by
the NCK without errors; however, output slots are forbidden in this range,
and cause an alarm on power up)
1st byte = LowByte of the logical start address
2nd byte = HighByte of the logical start address
3rd byte = 0 = without meaning
4th byte = 5 = segment no. for PROFIBUS/PROFINET
The individual bytes are explained under MD10366 $MN_HW_ASSIGN_DIG_FASTIN.
[hw] = Index (0 to 3) for addressing the external digital output bytes
Related to:
10700 PREPROCESSING_LEVEL N01, N02 V2, K1
- Program preprocessing level BYTE PowerOn
-
- - 0x01 0 0x7F 1/1
Description: Bit 0= 0:
No preprocessing
Bit 0= 1:
The call description of the cycles is formed during control power on. All the programs
in the directories _N_CUS_DIR, _N_CMA_DIR and _N_CST_DIR can be called in the part
program
without EXTERNAL
declaration. If the parameter interface of a cycle is changed
in the control, then this change does not become active until after Power On.
Bit 1=1:
During control power on, all cycles in the directories _N_CUS_DIR, _N_CMA_DIR and
_N_CST_DIR
are preprocessed
to form a process-optimizing compilation. These cycles are
then processed more quickly. Changes to the cycle programs do not become active until
after the next Power On.
Bit 2=1:
During control power on, the Siemens cycles in the directory _N_CST_DIR are
preprocessed to form a process-optimizing compilation (from SW 3.5).
Bit 3=1:
During control power on, the user cycles in the directory _N_CUS_DIR are preprocessed
to form a process-optimizing compilation (from SW 3.5).
Bit 4=1:
Preprocessing the user cycles in the directory _N_CMA_DIR
Bit 5=1:
All files marked with PREPRO in the PROG statement line are preprocessed (from SW 6.4)
Bit 5=0:
During control power on, all cycles in the directories activated by bits 1 to 4 are
preprocessed. This also applies to programs that are not marked with PREPRO.
Bit 6=1:
The compilation is stored in SRAM if there is inadequate space in DRAM (from SW 7.1).
Memory space is required for preprocessing cycles. Better utilization of memory can
be achieved by selective setting of the preprocessing:
The runtime-critical cycles are brought together in one directory. The remaining
cycles are in the other directory.
References:
/PG/, "Programming Guide Fundamentals" (EXTERNAL declaration)
Machine data
3.2 General machine data
Parameter Manual
Parameter Manual, 08/2015, 6FC5397-8EP40-0BA1 39
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