PROFIBUS Interface Center
SPC3
Page 18 V1.3 SPC3 Hardware Description
2003/04 Copyright (C) Siemens AG 2003. All rights reserved.
Bit 0 DIS_START_CONTROL
Monitoring the following start bit in UART. Set-Param Telegram overwrites this memory cell in
the DP mode. (Refer to the user-specific data.)
0 = Monitoring the following start bit is enabled.
1 = Monitoring the following start bit is switched off.
Bit 1 DIS_STOP_CONTROL
Stop bit monitoring in UART. Set-Pa
(Refer to the user-specific data.)
0 = Stop bit monitoring is enabled.
1 = Stop bit monitoring is switched off.
Bit 2 EN_FDL_DDB
Reserved
0 = The FDL_DDB receive is disabled.
Bit 3 MinTSDR
Default setting for the MinTSDR after reset for DP operation or combi operation
0 = Pure DP operation (default configuration!)
1 = Combi operation
Bit 4 INT_POL
Polarity of the interrupt output
0 = The interrupt output is low-active.
1 = The interrupt output is high-active.
Bit 5 EARLY_RDY
Moved up ready signal
0 = Ready is generated when the data are valid (read) or when the data are accepted
(write).
1 = Ready is moved up by one clock pulse.
Bit 6 Sync_Supported
Sync_Mode support
0 = Sync_Mode is not supported.
1 = Sync_Mode is supported.
Bit 7 Freeze_Supported
Freeze_Mode support
0 = Freeze_Mode is not supported.
1 = Freeze_Mode is supported.
Bit 8 DP_MODE
DP_Mode enable
0 = DP_Mode is disabled.
1 = DP_Mode is enabled. SPC3 sets up all DP_SAPs.
Bit 9 EOI_Time base
Time base for the end of interrupt pulse
0 = The interrupt inactive time is at least 1 usec long.
1 = The interrupt inactive time is at least 1 ms long.
Bit 10 User_Time base
Time base for the cyclical User_Time_Clock-Interrupt
0 = The User_Time_Clock-Interrupt occurs every 1 ms.
1 = The User_Time_Clock-Interrupt occurs every 10 ms.
Bit 11 WD_Test
Test mode for the Watchdog-Timer, no function mode
0 = The WD runs in the function mode.
1 = Not permitted
Bit 12 Spec_Prm_Puf_Mode
Special parameter buffer
0 = No special parameter buffer.
1 = Special parameter buffer mode .Parameterization data will be stored directly in the
special parameter buffer.
Bit 13 Spec_Clear_Mode
Special Clear Mode (Fail Safe Mode)
0 = No special clear mode.
1 = Special clear mode. SPC3 will accept datea telegramms with data unit = 0.
Figure 5.1: Mode-Register 0 Bit 12 .. 0.(can be written to, can be changed in offline only)