PROFIBUS Interface Center
SPC3
Page 42 V1.3 SPC3 Hardware Description
2003/04 Copyright (C) Siemens AG 2003. All rights reserved.
7.1.5 Application with th 80 C 165
CLK
5
48 MHz
3k3
34
P5
3k3
35
P5
3
XTEST0
XTEST1
DIVIDER
4
XRD
2
XWR
24
ALE
uC
36
RESET
uC
0
1
2
3
4
5
6
7
8
9
AB
44
43
41
40
37
42
32
31
29
25
0
1
2
3
4
5
6
7
DB
11
12
15
16
19
20
21
22
RXD 30
27
RTS
TXD
26
1K
8
XINT/MOT
M
1K
33
XCTS
9
XINT
14
13
7
XREADY
XDATAEX.
CLK2
AB0
AB1
AB2
AB3
AB4
AB5
AB6
AB7
DB(0:7)
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
TXD
RTS
RXD
RS485
RS485
RS485
uC
uC
uC
uC
SPC3
XWRL
XRD
XEXxIN
1
XCS
uC
XSPC3CS
23
MODE
1K
M
M
1K
AB(0:10)
uC
AB8
AB9
uC
XREADY
AB10 10
10
5V or
ground
The pull up / pull down resistances in the drawing above are only relevant for a in circuit tester.
Dual Port RAM Controller
The internal 1.5k RAM of the SPC3 is a Single Port RAM. Due to an integrated Dual Port RAM controller,
the controller, however, permits an almost simultaneous access of both ports (bus interface and
microsequencer interface). When there is a simultaneous access of both ports, the bus interface has
priority. This provides for the shortest possible access time. If SPC3 is connected to a microcontroller with
an asynchronous interface, SPC3 can evaluate the Ready signal.
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