Sony HCD-NXM2D - Page 72

72
HCD-NXM2D
Pin No. Pin Name I/O Description
• IC901 CXP973064-245R (MECHANISM CONTROLLER) (DBM07 Board)
1 NO_USE O Not used (open)
2 SDEN O Serial data enable signal output to SP3723CAFOPM
3
DOCTRL/
O Digital out on/off control signal output to CXD3068Q
ISBTEST
4 XRST_2753 O Not used
5SDA_EEP I/O Data bus with the EEPROM
6MNT1 I EEPROM ready signal input from TMC57929PGF-RDP
7 FCS_JMP_1 O Focus jump 1 signal output to the FAN8035L
8 FCS_JMP_2 O Focus jump 2 signal output to the FAN8035L
9 SENS_CD I Internal status (SENSE) signal input from CXD3068Q
10 CDSP2 O Not used
11 CDSP4 O Not used
12 XCS_DVD O Chip select signal output to TMC57929PGF-RDP
13 VSS — Ground
14 to 21 D0 to D7 I/O Two-way data bus with TMC57929PGF-RDP
22 INIT0_DVD I Interrupt signal input from TMC57929PGF-RDP
23 INIT1_DVD I Interrupt signal input from TMC57929PGF-RDP
24 MSCK_SAMBA O Not used
25 XRST_1882 O Reset signal output to TMC57929PGF-RDP
26 SCOR I Subcode sync (S0+S1) detection signal input from CXD3068Q
27 LAT_CD O Serial data latch pulse signal output to CXD3068Q
28 LD ON O Laser diode on/off control signal output to SP3723CAFOPM
29 MIRR I Mirror signal input from SP3723CAFOPM
30 COUT_CD I Numbers of track counted signal input from SP3723CAFOPM
31 INLIM I Detection signal input from limit in switch The optical pick-up is inner position when “H”
32 CS_ZIVA O Chip select signal output to ZIVA5X-C1F
33 SI_ZIVA I Serial data input from ZIVA5X-C1F
34 SO_ZIVA O Serial data output to ZIVA5X-C1F
35 SCK_ZIVA O Serial data transfer clock signal output to ZIVA5X-C1F
36 DRVIRQ O Interrupt request signal output to ZIVA5X-C1F
37 DRVRDY O Ready signal output to ZIVA5X-C1F
38 RST I System reset signal input from ZIVA5X-C1F
39 VSS — Ground
40 XTAL I System clock input terminal (20 MHz)
41 EXTAL O System clock output terminal (20 MHz)
42 VDD — Power supply (+3.3V)
43, 44 SLED_A, SLED_B O Sled motor drive signal output to FAN8035L
45 SCK_DSD O Clock output to TMC57929PGF-RDP
46 SDOUT_DSD O Serial data output (Not used)
47 SDIN_DSD I Serial data input (Not used)
48 READY_DSD I Ready signal input (Not used)
49 DATA_CD O Serial data output to CXD3068Q
50 CLOK_CD O Serial data transfer clock signal output to CXD3068Q
51 XMSLAT O Serial data latch pulse signal (Not used)
52 SQSO I Subcode Q data input from TMC57929PGF-RDP
53 MUTE_DSD O Muting on/off control signal (Not used)
54 SQCK O Subcode Q data reading clock signal output to TMC57929PGF-RDP
55 VSS — Ground
56 CONTROL_2 I Not used