4-190
Figure 4.3.108 Speed control architecture (SLV mode )
(c)SV control mode and PMSV mode:
. Speed control system (ASR) tunes the output frequency, to make the frequency
reference and the feedback speed close to 0.
. ASR integrator output can be removed or restricted. All outputs are through the
low-pass filter. The torque will also be limited.
20-00
20-02
20-01
20-03
20-08
Frequency
Reference
Speed
Feedback
I Limit
20-04
Primary
delay time
Torque
Limit
Torque
Reference
21-05 to 21-08
20-07 = 1 (during accel/decel)
20-07 = 0
Speed Control Integral reset
03-00 to 03-07 = 43
P
I
+
-
+
+
Figure 4.3.109 Speed control architecture (SV mode )
A. The ASR setting of V/F +PG control mode
(1) In V/F+PG mode, set the proportional (P) gain and integral (I) time at the minimum
output frequency (20-02 and 20-03) and maximum output frequency(20-00 and
20-01). Refer to the figure 4.3.110.
Figure 4.3.110 ASR gain setting (V/F+PG)
P.I
0%
100%
(Fmax , 01-02)
P=20-00
I=20-01
P=20-02
I=20-03
Output
Frequency