Tektronix 2205 Service Manual

Theory of Operation—-2205 Service
Source Follower
The Channel 1 signal from the input attenuator is
connected to the source follower Q13A via R6 and
G6. Resistor R5 provides the input resistance. Resis
tor R6 provides input current limiting for Q13A and
Qt4. FET Q13B is a constant current source for
Q13A. Transistors Q13A and Q138 provide a high
output impedance for the attenuator stage and the
input drive current needed for the Paraphase Ampli
fier U30 (first stage of amplification).
If excessively high amplitude signals are applied
to the source follower Q13A, the signal current will
be limited by R6 and Q14 (connected as diode) and
the gate-source junction of Q13A. If an excessive
negative going signal causes Q14 to become for
ward biased, 013A gate is clamped to about -9.3V.
An excessive positive going signal will forward bias
the gate-source junction of Q13A. As soon as gate
current flows, the gate voltage will stop increasing.
Gate current is limited by the high resistance of R6.
Paraphase Amplifier
Paraphase Amplifier U30 converts the single-
ended signal from Q13 into a differential signal for
the Vertical Preamplifier. The signal from Q13A pin 5
goes to the base of one transistor in U30. The other
input transistor in U30 is biased by the divider net
work formed by R30, R31, R32 and variable R33.
Emitter current for the two input transistors is sup
plied by R22 and R23. Resistor R29 sets the gain for
the stage, The collector current of the two input
transistors serves as emitter current for the dif
ferential output transistor pairs. Base bias voltages
for the output pairs are developed by the divider
network formed by R39, R41, R42 and CH 1
VOLTS/DIV Variable control. The transistors of U3G
have matched characteristics, so the ratio of cur
rents In the two transistors U83B and U83C, con
nected as diodes, determines the current ratios in
the output transistor pairs of U30.
As CH 1 VOLTS/DIV Variable control is rotated
from calibrated to uncalibrated, the conduction level
of the transistors connected to R35 increases. Since
the transistor pairs are cross connected, the
increased conduction in one pair of transistors sub
tracts from the output current produced by the tran
sistor pair connected to R38, and the overall gain of
the amplifier decreases. Potentiometer R33 is
adjusted to balance the amplifier for minimal dc
trace shift as the CH 1 VOLTS/DIV Variable control is
rotated.
Incorporated in the Channel 2 Paraphase Ampli
fier is circuitry that allows the polarity of the Chan
nel 2 signal to be inverted. When CH 2 INVERT
switch S90 is in NORM, the transistor pairs in U80 are
biased as they are in U30, and CH 2 trace is not
inverted. In CH 2 INVERT position, connections to
the bases of the output transistor pairs are
reversed, to produce an inverted Channel 2 trace.
Potentiometer R83 is adjusted for minimal dc trace
shift in CH 2 INVERT when rotating CH 2 VOLTS/DIV
Variable control. Potentiometer R84 is switched in
with R83 when in INVERT; it is adjusted for minimal
dc trace shift when rotating CH 2 VOLTS/DIV
Variable control.
Vertical Preamplifiers
The Channel 1 and Channel 2 Vertical Pre
amplifiers, shown on Diagram 2, are identical in
operation. Operation of the Channel 1 amplifier is
described. Differential signal current from the
Paraphase Amplifier is amplified to produce drive
current for the Vertical Output Amplifier. Internal trig
ger signals for the Trigger circuitry are picked off
before the Vertical Preamplifier. The Channel Switch
circuitry controls channel selection for the crt
display.
Common-base transistors Q102 and Q103, which
complete the Paraphase Amplifier portion of the
circuitry shown on Diagram 1, convert differential
current from the Paraphase Amplifier into level-
shifted voltages that drive the bases of the input
transistors of Vertical Preamplifier U130 and the
Internal Trigger circuitry.
Emitter current for the input transistors of U130 is
supplied by Q114 and Q115. The base bias of Q114
and Q115 is adjusted by the Channel 1 VERTICAL
POSITION Control R123. The collector current of
each input transistor of U130 is the emitter current
for two of the differential output transistors. One
collector of each output pair is grounded and the
other provides output drive to the Vertical Output
Amplifier. The base bias voltages of the transistors
with grounded collectors are held at ground potential
by R136. The base voltages of the other transistors
are controlled by the Channel Switch circuitry.
When Channel 1 is selected to drive the Vertical
Output Amplifier, the Q output (pin 9) of U540A is HI.
The transistors with the ungrounded collectors is
then forward-biased, and the Channel 1 signal is
conducted through to the Vertical Output Amplifier,
if Channel 1 is not selected, then the Q output of
U540A is LO. The transistors with the ungrounded
collectors are then reverse-biased and the output
signals will be conducted to ground by the other
transistor pair. The gain of the Preamplifier is set by
adjusting R145 to control the signal current that is
shunted between the two differential outputs.
3-4

Tektronix 2205 Specifications

General

Brand	Tektronix
Model	2205
Category	Test Equipment
Language	English