6-50
3. Test U760 pin 19 for a LO-to-HI transition between chip selects. If missing, replace U760; if ok,
suspect U854.
2. Run test 2140 in CONTINUOUS MODE and check for chip select at U760 pin 11. If not present,
troubleshoot the System Address Decoding circuitry (U884, U862, U866A, U870B, and associated
components) for proper inputs and outputs.
Now using the CH 2 probe:
1. Set up the test scope as per Step 1 of the 2110 troubleshooting procedure.
If test
=
FAIL then look for failure using the following steps:
Troubleshooting Procedure:
This is the first test for the PMISCOUT and PMISCIN registers. The byte to PMISCOUT U760 is set to
00000000 and PMISCIN (bit 4) is tested for
=
O.The test result flag is set PASS or FAIL. PMISCOUT
is then set to 10000000 and PMISCIN (bit 4) is again tested. If the test fails, the test result is set to
FAIL.
Testing Method:
Processor Miscellaneous Out and Processor Miscellaneous In Registers (A12U750 and A12U854)
Diagnostic Bit 1 (schematic diagram 1):
2140
DIAG1
4. Check INTREG U654 pin 15 for a LO-to-HI transition when BUSTAKE on PCREG U860 pin 16 is
set from LO-to-HI; if not, then check U332D (schematic diagram 2) for correct gating.
3. Check that BUSTAKE on PCREG U860 pin 16 has LO-to-HI and HI-to-LO transitions on alternate
PCREG chip selects. If not, suspect problem with U860.
2. Run test 2130 in CONTINUOUS MODE and check for INTREG chip select at U654 pin 1 and 19. If
not present, troubleshoot the System Address Decoding circuitry (U884, U862, U866A, U870B,
and associated components) for proper inputs and outputs.
Now using the CH 2 probe:
1. Set up the test scope as per Step 1 of the 2110 troubleshooting procedure.
If test
=
FAIL then look for failure using the following steps:
Troubleshooting Procedure:
The PCREG is set for a BUSTAKE (x1xxxxxx). This time the INTREG (bit 6) should
=
1.
The result is
set to FAIL if the test fails.
To test for stuck at 1, PCREG U860 is written the pattern xOOxxxxx to clear BUS REQUEST and
BUSTAKE bits. Then INTREG (bit 6) is tested for
=
0, and the PASS/FAIL results are set accordingly.
Testing Method:
Page Control Register A12U860 (schematic diagram 1), OR-gate A12U332D (schematic diagram 2),
and Interrupt Register A12U654:
2130
BUSTAKE
Table 6-6 (cont)
Maintenance-2430 Service
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