12
MMC[x]_CLK (Output)
MMC[x]_CMD (Output)
MMC[x]_DAT[7:0] (Outputs)
13
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
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SPRS717H –OCTOBER 2011–REVISED MAY 2015
Table 7-90. Switching Characteristics for MMC[x]_CMD and MMC[x]_DAT[7:0]—High-Speed Mode
(see Figure 7-95)
OPP100 OPP50
NO. PARAMETER UNIT
MIN TYP MAX MIN TYP MAX
t
d(CLKL-
Delay time, MMC_CLK rising clock edge to
12 3 14 3 17.5 ns
CMD)
MMC_CMD transition
Delay time, MMC_CLK rising clock edge to
13 t
d(CLKL-DAT)
3 14 3 17.5 ns
MMC_DATx transition
Figure 7-95. MMC[x]_CMD and MMC[x]_DAT[7:0] Output Timing—High Speed Mode
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