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Colibri Carrier Board Design Guide
Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com
Page | 55
Figure 48: Diode circuit for backfeeding prevention with an external pull-up resistor
3.7.5.8 Capacitive Coupling
Some high-speed signals allow (or require) capacitive coupling. Capacitive coupling blocks all DC
current and eliminates backfeeding caused by a DC offset of high-speed signals. Most high-speed
interfaces and differential clocks (e.g., LVPECL, CML) use capacitive coupling nowadays. Typical
signals using capacitive coupling are PCIe, SATA, DisplayPort, and the SuperSpeed signals of USB.
Figure 49: Capacitive coupled signals
PeripheralSoC
IO Rail (off)
RX
Module Pin
Peripheral Rail (on)
TX
0V 3.3V
3.3V0V
High
3.3V_SW (off)
PeripheralSoC
IO Rail (off)
RX
Module Pin
Peripheral Rail (on)
TX
0V 3.3V
1.6V DC0V
High

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