Xilinx AC701 User Manual

AC701 Evaluation Board www.xilinx.com 17
UG952 (v1.3) April 7, 2015
Feature Descriptions
G8 DDR3_D60 SSTL15 180 DQ60
H8 DDR3_D61 SSTL15 182 DQ61
D6 DDR3_D62 SSTL15 192 DQ62
E6 DDR3_D63 SSTL15 194 DQ63
AC6 DDR3_DM0 SSTL15 11 DM0
AC4 DDR3_DM1 SSTL15 28 DM1
AA3 DDR3_DM2 SSTL15 46 DM2
U7 DDR3_DM3 SSTL15 63 DM3
G1 DDR3_DM4 SSTL15 136 DM4
F3 DDR3_DM5 SSTL15 153 DM5
G5 DDR3_DM6 SSTL15 170 DM6
H9 DDR3_DM7 SSTL15 187 DM7
W8 DDR3_DQS0_N SSTL15 10 DQS0_N
V8 DDR3_DQS0_P SSTL15 12 DQS0_P
AE5 DDR3_DQS1_N SSTL15 27 DQS1_N
AD5 DDR3_DQS1_P SSTL15 29 DQS1_P
AE1 DDR3_DQS2_N SSTL15 45 DQS2_N
AD1 DDR3_DQS2_P SSTL15 47 DQS2_P
V2 DDR3_DQS3_N SSTL15 62 DQS3_N
V3 DDR3_DQS3_P SSTL15 64 DQS3_P
B1 DDR3_DQS4_N SSTL15 135 DQS4_N
C1 DDR3_DQS4_P SSTL15 137 DQS4_P
A5 DDR3_DQS5_N SSTL15 152 DQS5_N
B5 DDR3_DQS5_P SSTL15 154 DQS5_P
H4 DDR3_DQS6_N SSTL15 169 DQS6_N
J4 DDR3_DQS6_P SSTL15 171 DQS6_P
G7 DDR3_DQS7_N SSTL15 186 DQS7_N
H7 DDR3_DQS7_P SSTL15 188 DQS7_P
R2 DDR3_ODT0 SSTL15 116 ODT0
U2 DDR3_ODT1 SSTL15 120 ODT1
N8 DDR3_RESET_B LVCMOS15 30 RESET_B
T3 DDR3_S0_B SSTL15 114 S0_B
Table 1-4: DDR3 Memory Connections to the FPGA (Cont’d)
FPGA Pin (U1)
Schematic Net
Name
I/O Standard
J1 DDR3 Memory
Pin Number Pin Name
Send Feedback

Xilinx AC701 Specifications

General

Brand	Xilinx
Model	AC701
Category	Motherboard
Language	English