Xilinx FMC XM105 - Page 14

14 www.xilinx.com FMC XM105 Debug Card User Guide
UG537 (v1.2) September 24, 2010
Chapter 1: XM105
C2
No Connect Not Used
D1 PG_C2M
C3 D4
No Connect Not Used
C6 D5
C7 D8 FMC_LA01_CC_P J1, P1
C10 FMC_LA06_P
J1, P1
D9 FMC_LA01_CC_N
J1, P1
C11 FMC_LA06_N D11 FMC_LA05_P
C14 FMC_LA10_P D12 FMC_LA05_N
C15 FMC_LA10_N D14 FMC_LA09_P
C18 FMC_LA14_P
J1
D15 FMC_LA09_N
C19 FMC_LA14_N D17 FMC_LA13_P
J1
C22 FMC_LA18_CC_P D18 FMC_LA13_N
C23 FMC_LA18_CC_N D20 FMC_LA17_CC_P
C26 FMC_LA27_P
J20
D21 FMC_LA17_CC_N
C27 FMC_LA27_N D23 FMC_LA23_P
J20
C30 IIC_SCL_MAIN
EEPROM,
Si570
D24 FMC_LA23_N
C31 IIC_SDA_MAIN D26 FMC_LA26_P
C34 GA0 EEPROM D27 FMC_LA26_N
C35 VCC12 D29 FMC_TCK
J5C37 VCC12 D30 FMC_TDI
C39 VCC3V3 D31 FMC_TDO
D32 VCC3V3_AUX
D33 FMC_TMS J5
D34 No connect
D35 GA1 EEPROM
D36 VCC3V3
D38 VCC3V3
D40 VCC3V3
Table 1-3: VITA 57.1 FMC HPC Connections (Cont’d)
FMC
HPC Pin
Schematic Net
Name
Breakout
Signal to
Connector
FMC
HPC Pin
Schematic Net
Name
Breakout
Signal to
Connector
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