FMC XM105 Debug Card User Guide www.xilinx.com 19
UG537 (v1.2) September 24, 2010
Board Technical Description
3. Connector J5 FMC JTAG
This 9-position connector provides an interface from the XM105 to the board’s FMC LPC or
FMC HPC JTAG signals. This interface is not intended to provide a means to program the
FPGA on the board. See the Xilinx board user guide for details of board JTAG interface
support of FMC mezzanine cards. Connections between the mezzanine FMC HPC and
connector J5 are defined in Table 1-4.
4. Connector J20
This 16-position connector provides an interface from the XM105 to 16 single-ended
signals on the board’s FMC LPC or FMC HPC interface. Connections between the
mezzanine FMC HPC and connector J20 are defined in Table 1-5.
Table 1-4: Mezzanine FMC HPC J17 to Connector J5 Pin Assignments
FMC HPC
Connector J17 Pin
Signal Name
J5 Connector
Pin
3.3V 3.3V 1
GROUND GROUND 2
–NC
(1)
3
D29 FMC_TCK 4
–NC5
D31 FMC_TDO 6
D30 FMC_TDI 7
–NC8
D33 FMC_TMS 9
Notes:
1. No connection (NC).
Table 1-5: Mezzanine FMC HPC J17 to Connector J20 Pin Assignments
FMC HPC
Connector
J17 Pin
Signal Name
J20
Connector
Odd Pins
FMC HPC
Connector
J17 Pin
Signal Name
J20
Connector
Even Pins
G21 FMC_LA20_P 1 H28 FMC_LA24_P 2
G22 FMC_LA20_N 3 H29 FMC_LA24_N 4
H25 FMC_LA21_P 5 G27 FMC_LA25_P 6
H26 FMC_LA21_N 7 G28 FMC_LA25_N 8
G24 FMC_LA22_P 9 D26 FMC_LA26_P 10
G25 FMC_LA22_N 11 D27 FMC_LA26_N 12
D23 FMC_LA23_P 13 C26 FMC_LA27_P 14
D24 FMC_LA23_N 15 C27 FMC_LA27_N 16
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