Xilinx KC705 User Manual

KC705 Evaluation Board 40
UG810 (v1.8) March 20, 2018 www.xilinx.com
Chapter 1: KC705 Evaluation Board Features
For more information refer to 7 Series FPGAs GTX Transceivers User Guide (UG476) [Ref 12]
and 7 Series FPGAs Integrated Block for PCI Express User Guide (AXI) (PG054) [Ref 13].
MGTXRXP2_116_P6 P6 PCIE_RX1_P B19 PETp1 GTXE2_CHANNEL_X0Y6
MGTXRXN2_116_P5 P5 PCIE_RX1_N B20 PETn1 GTXE2_CHANNEL_X0Y6
MGTXTXP3_116_L4 L4 PCIE_TX0_P A16 PERp0 GTXE2_CHANNEL_X0Y7
MGTXTXN3_116_L3 L3 PCIE_TX0_N A17 PERn0 GTXE2_CHANNEL_X0Y7
MGTXRXP3_116_M6 M6 PCIE_RX0_P B14 PETp0 GTXE2_CHANNEL_X0Y7
MGTXRXN3_116_M5 M5 PCIE_RX0_N B15 PETn0 GTXE2_CHANNEL_X0Y7
MGTREFCLK0P_116_L8 L8 SI5326_OUT_C_P MGT_BANK_116
MGTREFCLK0N_116_L7 L7 SI5326_OUT_C_N MGT_BANK_116
MGTREFCLK1P_116_N8 N8 FMC_LPC_GBTCLK0_M2C_C_P MGT_BANK_116
MGTREFCLK1N_116_N7 N7 FMC_LPC_GBTCLK0_M2C_C_N MGT_BANK_116
Table 1-13: GTX Quad 116 to PCIe Edge Connector Connections (Cont’d)
Quad 116 Pin Name
FPGA
Pin (U1)
Schematic Net Name
PCIe Edge
Connector
Pin
PCIe
Edge in
Name
FFG900 Placement
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Xilinx KC705 Specifications

General

Brand	Xilinx
Model	KC705
Category	Motherboard
Language	English