Xilinx KC705

KC705 Evaluation Board 76
UG810 (v1.8) March 20, 2018 www.xilinx.com
Chapter 1: KC705 Evaluation Board Features
Table 1-31 defines the voltage and current values for each power rail controlled by the
UCD9248 PMBus controller at Address 52 (U55).
Table 1-32 defines the voltage and current values for each power rail controlled by the
UCD9248 PMBus controller at Address 53 (U56).
Table 1-31: Power Rail Specifications for UCD9248 PMBus controller at Address 52
Shutdown
Threshold
(1)
Rail
Number
Rail
Name
Schematic
Rail Name
Nominal V
OUT
(V)
PG On Threshold (V) PG Off Threshold (V) On Delay (ms) Rise Time (ms) Off Delay (ms) Fall Time (ms) V
OUT
Over Fault (V)
I
OUT
Over Fault (A)
Temp Over Fault (°C)
1 Rail #1 VCCINT_FPGA 1 0.9 0.85 0 5 10 1 1.15 20 90
2 Rail #2 VCCAUX 1.8 1.62 1.53 0 5 5 1 2.07 10.41 90
3 Rail #3 VCC3V3 3.3 2.97 2.805 0 5 4 1 3.795 10.41 90
4 Rail #4 VADJ 2.5 2.25 2.125 0 5 3 1 2.875 10.41 90
Notes:
1. The values defined in these columns are the voltage, current, and temperature thresholds that cause the regulator to shut
down if the value is exceeded.
Table 1-32: Power Rail Specifications for UCD9248 PMBus controller at Address 53
Shutdown
Threshold
(1)
Rail
Number
Rail
Name
Schematic
Rail Name
Nominal V
OUT
(V)
PG On Threshold (V) PG Off Threshold (V) On Delay (ms) Rise Time (ms) Off Delay (ms) Fall Time (ms) V
OUT
Over Fault (V)
I
OUT
Over Fault (A)
Temp Over Fault (°C)
1 Rail #1 VCC2V5_FPGA 2.5 2.25 2.125 0 5 1 1 2.875 10.41 90
2 Rail #2 VCC1V5 1.5 1.35 1.275 0 5 0 1 1.725 10.41 90
3 Rail #3 MGTAVCC 1 0.9 0.85 0 5 7 1 1.45 10.41 90
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