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Xilinx VCU118 User Manual
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VCU1
18 Board Us
er Guide
114
UG1224 (v1.0) December 15, 2
016
www
.xilinx.com
Appendix
A
VIT
A 57.1 and 57.4 FMC Connect
or
Pinouts
Overview
Figure
A-1
shows the pinout of the FPGA mezzanine card (FMC) high pin count (HPC) J2
defined by the VITA 5
7.1 FMC specification. For a description of how the
VCU118 evaluation
board implements the FMC sp
ecification, see
FPGA Mezzanine Card Interface, page
93
.
X-Ref Targ
et - Figure A-1
Figure A-1:
FMC Connector Pinouts
;
S
e
n
d
F
e
e
d
b
a
c
k
113
115
Table of Contents
Default Chapter
2
Revision History
2
Table of Contents
3
Chapter 1: Introduction
5
Overview
5
Additional Resources
5
Block Diagram
6
VCU118 Evaluation Board Block Diagram
6
Board Features
7
Clock Sources
7
Board Specifications
8
Dimensions
8
Environmental
8
Humidity
8
Operating Voltage
9
Chapter 2: Board Setup and Configuration
10
VCU118 Board Component Descriptions
11
Board Component Location
10
Default Switch and Jumper Settings
14
VCU118 Evaluation Board Components
11
Switches
14
Jumpers
15
VCU118 Board Header Jumper Locations
15
ATX Power Supply Adapter Cable
16
Installing the VCU118 Board in a PC Chassis
16
To Install the VCU118 Board in a PC Chassis
16
Configuration Modes
17
FPGA Configuration
17
SW16 Default Settings
18
Chapter 3: Board Component Descriptions
19
Overview
19
Encryption Key Battery Backup Circuit
20
I/O Bank Voltage Rails
21
I/O Voltage Rails
21
DDR4 Component Memory
22
DDR4 Memory 80-Bit I/F C1 to FPGA U1 Banks 71, 72, and 73
22
DDR4 Memory 80-Bit I/F C2 to FPGA U1 Banks 40, 41, and 42
26
RLD3 Component Memory
31
Linear BPI Flash Memory
36
Linear BPI 128 MB (1 Gbit) Flash Memory
37
BPI Flash Memory Connections to FPGA U1
38
Micro-SD Card Interface
39
Digilent USB JTAG Module
40
JTAG Chain Block Diagram
40
Clock Generation
41
FMC Connector JTAG Bypass
41
VCU118 Board Clock Sources
41
System Clock
43
VCU118 System Clock
44
Programmable User Clock 1
45
VCU118 Board User and MGT Clocks
46
Programmable User Clock 2 (QSFP Clock)
47
VCU118 Board Programmable QSFP Clock
47
250 Mhz Clock
48
VCU118 Board 250 Mhz Clocks
48
User SMA Clock
49
Jitter Attenuated Clock
50
VCU118 Board QSFP Jitter Attenuated Clock
51
GTY Transceivers
52
Right Side Quads
52
VCU118 FPGA U1 GTY Transceiver Bank 120 Connections
54
VCU118 FPGA U1 GTY Transceiver Bank 121 Connections
55
Left Side Quads
60
VCU118 FPGA U1 GTY Transceiver Bank 224 Connections
61
VCU118 FPGA U1 GTY Transceiver Bank 225 Connections
62
VCU118 FPGA U1 GTY Transceiver Bank 226 Connections
63
VCU118 FPGA U1 GTY Transceiver Bank 227 Connections
64
VCU118 FPGA U1 GTY Transceiver Bank 231 Connections
65
VCU118 FPGA U1 GTY Transceiver Bank 232 Connections
66
VCU118 FPGA U1 GTY Transceiver Bank 233 Connections
67
PCI Express Endpoint Connectivity
68
Pcie Edge Connector Clock
68
PCI Express Lane Size Select Jumper J7
69
Pcie Clock
69
VCU118 Board FPGA U1 to Pcie Edge U2 Connections
69
28 Gb/S QSFP+ Module Connectors
72
VCU118 Board FPGA U1 to QSFP+ Module QSFP1 U145 Connections
73
Firefly Connector
75
Firefly Connector System
75
Firefly Connector Schematic
76
VCU118 Board FPGA U1 to Firefly J6 Connections
77
10/100/1000 Mb/S Tri-Speed Ethernet PHY
78
FPGA U1 to Ethernet PHY U7 Connections
78
Ethernet PHY Status Leds
79
VCU118 Ethernet PHY Status Leds
79
Dual USB-To-UART Bridge
80
VCU118 Dual UART CP2105GM
80
FPGA U1 to CP2105GM U34 Connections
81
I2C Bus, Topology, and Switches
81
VCU118 IIC Bus
82
Status and User Leds
83
VCU118 Board Status and User Leds
83
User GPIO Leds
85
User I/O
85
User Pushbuttons
86
CPU Reset Pushbutton
87
GPIO DIP Switch
87
VCU118 GPIO Connections to FPGA U1
88
Pmod Connectors J52 and J53 with Level Shifters U41 and U42
89
User Pmod GPIO Headers
89
Power On/Off Slide Switch SW1
91
Switches
91
Power On/Off Switch SW1
92
FPGA Mezzanine Card Interface
93
Program_B Pushbutton Switch
93
Program_B Pushbutton Switch SW4
93
FMC HPC1 Connector J2
94
J2 FMC Connector Type
94
J2 VITA 57.1 FMC HPC1 Connections
95
FMCP Connector J22
98
J22 FMC+ Connector Type
98
J22 VITA 57.4 FMCP HSCP Connections
99
VCU118 Board Power System
106
VCU118 Power System Block Diagram
106
Onboard Power System Devices
107
FMC VADJ_1V8 Power Rail
108
Monitoring Voltage and Current
108
VCU118 Voltage Regulators and INA226 Power Monitors
109
Cooling Fan
110
Cooling Fan Circuit
110
System Controller
111
Vcu118 Scui
111
Configuration Options
112
VCU118 Board FPGA Configuration Modes
112
A-1: FMC Connector Pinouts
114
Component Descriptions
19
Virtex Ultrascale+ XCVU9P-L2FLGA2104 Device
19
Appendix A: VITA 57.1 and 57.4 FMC Connector Pinouts
114
Overview
114
FMCP Connector Pinouts
115
Appendix B: Master Constraints File Listing
116
Overview
116
VCU118 Board Constraints File Listing
116
Appendix C: Regulatory and Compliance Information
160
Overview
160
Declaration of Conformity
160
Directives
160
Standards
160
Electromagnetic Compatibility
161
Safety
161
Markings
161
Appendix D: Additional Resources and Legal Notices
162
Xilinx Resources
162
Solution Centers
162
References
162
Please Read: Important Legal Notices
164
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Xilinx VCU118 Specifications
General
Brand
Xilinx
Model
VCU118
Category
Motherboard
Language
English
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