Xilinx VCU118 User Manual

VCU118 Board User Guide 55
UG1224 (v1.0) December 15, 2016
www.xilinx.com
Chapter 3: Board Component Descriptions
Table 3-9: VCU118 FPGA U1 GTY Transceiver Bank 121 Connections
MGT
Bank
FPGA
(U1) Pin
FPGA (U1) Pin
Name
Schematic Net Name
Connected
Pin
Connected Pin
Name
Connected
Device
GTY
Bank
121
AT42 MGTYTXP0_121 FMCP_HSPC_DP0_C2M_P C2 DP0_C2M_P
FMC+ HSPC J22
AT43 MGTYTXN0_121 FMCP_HSPC_DP0_C2M_N C3 DP0_C2M_N
AR45 MGTYRXP0_121 FMCP_HSPC_DP0_M2C_P C6 DP0_M2C_P
AR46 MGTYRXN0_121 FMCP_HSPC_DP0_M2C_N C7 DP0_M2C_N
AP42 MGTYTXP1_121 FMCP_HSPC_DP1_C2M_P A22 DP1_C2M_P
AP43 MGTYTXN1_121 FMCP_HSPC_DP1_C2M_N A23 DP1_C2M_N
AN45 MGTYRXP1_121 FMCP_HSPC_DP1_M2C_P A2 DP1_M2C_P
AN46 MGTYRXN1_121 FMCP_HSPC_DP1_M2C_N A3 DP1_M2C_N
AM42 MGTYTXP2_121 FMCP_HSPC_DP2_C2M_P A26 DP2_C2M_P
AM43 MGTYTXN2_121 FMCP_HSPC_DP2_C2M_N A27 DP2_C2M_N
AL45 MGTYRXP2_121 FMCP_HSPC_DP2_M2C_P A6 DP2_M2C_P
AL46 MGTYRXN2_121 FMCP_HSPC_DP2_M2C_N A7 DP2_M2C_N
AL40 MGTYTXP3_121 FMCP_HSPC_DP3_C2M_P A30 DP3_C2M_P
AL41 MGTYTXN3_121 FMCP_HSPC_DP3_C2M_N A31 DP3_C2M_N
AJ45 MGTYRXP3_121 FMCP_HSPC_DP3_M2C_P A10 DP3_M2C_P
AJ46 MGTYRXN3_121 FMCP_HSPC_DP3_M2C_N A11 DP3_M2C_N
AK38 MGTREFCLK0P_121 FMCP_HSPC_GBT0_0_P 1 Q0 U40 ICS85411A
clock buffer
AK39 MGTREFCLK0N_121 FMCP_HSPC_GBT0_0_N 2 NQ0
AH38 MGTREFCLK1P_121 FMCP_HSPC_GBT1_0_P 5 Q0_P
U39 ICS855S006I
clock buffer
AH39 MGTREFCLK1N_121 FMCP_HSPC_GBT1_0_N 6 Q0_N
BF43 MGTRREF_LS MGTRREF_121 R175.1 100Ω 1% P/U to MGTAVTT_FPGA
BF42 MGTAVTTRCAL MGTAVTT_FPGA NA NA NA
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Xilinx VCU118 Specifications

General

Brand	Xilinx
Model	VCU118
Category	Motherboard
Language	English