VCU118 Board User Guide 154
UG1224 (v1.0) December 15, 2016
www.xilinx.com
Appendix B: Master Constraints File Listing
set_property IOSTANDARD LVCMOS18 [get_ports "IIC_MAIN_SCL"];
set_property PACKAGE_PIN AL24 [get_ports "IIC_MAIN_SDA"];
set_property IOSTANDARD LVCMOS18 [get_ports "IIC_MAIN_SDA"];
# IIC MUX RESET
set_property PACKAGE_PIN AL25 [get_ports "IIC_MUX_RESET_B"];
set_property IOSTANDARD LVCMOS18 [get_ports "IIC_MUX_RESET_B"];
# ETHERNET PHY
set_property PACKAGE_PIN AU23 [get_ports "PHY1_CLKOUT"];
set_property IOSTANDARD LVCMOS18 [get_ports "PHY1_CLKOUT"];
set_property PACKAGE_PIN AR22 [get_ports "PHY1_GPIO_0"];
set_property IOSTANDARD LVCMOS18 [get_ports "PHY1_GPIO_0"];
set_property PACKAGE_PIN AV23 [get_ports "PHY1_MDC "];
set_property IOSTANDARD LVCMOS18 [get_ports "PHY1_MDC "];
set_property PACKAGE_PIN AR23 [get_ports "PHY1_MDIO"];
set_property IOSTANDARD LVCMOS18 [get_ports "PHY1_MDIO"];
set_property PACKAGE_PIN AR24 [get_ports "PHY1_PDWN_B_I_INT_B_O"];
set_property IOSTANDARD LVCMOS18 [get_ports "PHY1_PDWN_B_I_INT_B_O"];
set_property PACKAGE_PIN BA21 [get_ports "PHY1_RESET_B"];
set_property IOSTANDARD LVCMOS18 [get_ports "PHY1_RESET_B"];
set_property PACKAGE_PIN AU22 [get_ports "PHY1_SGMII_CLK_N"];
set_property IOSTANDARD DIFF_HSTL_I_18 [get_ports "PHY1_SGMII_CLK_N"];
set_property PACKAGE_PIN AT22 [get_ports "PHY1_SGMII_CLK_P"];
set_property IOSTANDARD DIFF_HSTL_I_18 [get_ports "PHY1_SGMII_CLK_P"];
set_property PACKAGE_PIN AV21 [get_ports "PHY1_SGMII_IN_N"];
set_property IOSTANDARD DIFF_HSTL_I_18 [get_ports "PHY1_SGMII_IN_N"];
set_property PACKAGE_PIN AU21 [get_ports "PHY1_SGMII_IN_P"];
set_property IOSTANDARD DIFF_HSTL_I_18 [get_ports "PHY1_SGMII_IN_P"];
set_property PACKAGE_PIN AV24 [get_ports "PHY1_SGMII_OUT_N"];
set_property IOSTANDARD DIFF_HSTL_I_18 [get_ports "PHY1_SGMII_OUT_N"];
set_property PACKAGE_PIN AU24 [get_ports "PHY1_SGMII_OUT_P"];
set_property IOSTANDARD DIFF_HSTL_I_18 [get_ports "PHY1_SGMII_OUT_P"];
# SYSTEM CONTROLLER
set_property PACKAGE_PIN BD21 [get_ports "SYSCTLR_GPIO_5"];
set_property IOSTANDARD LVCMOS18 [get_ports "SYSCTLR_GPIO_5"];
set_property PACKAGE_PIN BA25 [get_ports "SYSCTLR_GPIO_6"];
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