Xilinx VCU128 User Manual

Table 13: XCVU37P U1 GTY Transceiver Bank 134 Connections
MGT
Bank
FPGA
(U1)
Pin
FPGA (U1) Pin
Name
Schematic Net
Name
Connected
Pin
Connected
Pin Name
Connected
Device
GTY bank
134
L48 MGTYTXP0_134 QSFP2_TX1_P 36 TX1P
L49 MGTYTXN0_134 QSFP2_TX1_N 37 TX1N
L53 MGTYRXP0_134 QSFP2_RX1_P 17 RX1P
L54 MGTYRXN0_134 QSFP2_RX1_N 18 RX1N
L44 MGTYTXP1_134 QSFP2_TX2_P 3 TX2P
L45 MGTYTXN1_134 QSFP2_TX2_N 2 TX2N
K51 MGTYRXP1_134 QSFP2_RX2_P 22 RX2P
K52 MGTYRXN1_134 QSFP2_RX2_N 21 RX2N
K46 MGTYTXP2_134 QSFP2_TX3_P 33 TX3P
K47 MGTYTXN2_134 QSFP2_TX3_N 34 TX3N
J53 MGTYRXP2_134 QSFP2_RX3_P 14 RX3P
J54 MGTYRXN2_134 QSFP2_RX3_N 15 RX3N
J48 MGTYTXP3_134 QSFP2_TX4_P 6 TX4P
J49 MGTYTXN3_134 QSFP2_TX4_N 5 TX4N
H51 MGTYRXP3_134 QSFP2_RX4_P 25 RX4P
H52 MGTYRXN3_134 QSFP2_RX4_N 24 RX4N
T42 MGTREFCLK0P_134 QSFP2_SI570_CLOCK_P
1
4 OUT
U90 SI570 I2C
prog. osc.
T43 MGTREFCLK0N_134 QSFP2_SI570_CLOCK_N
1
5 OUT_B
R40 MGTREFCLK1P_134 SI5328_CLOCK1_C_P
1
28 CKOUT1_P
U87 SI5328B
jitter atten.
R41 MGTREFCLK1N_134 SI5328_CLOCK1_C_N
1
29 CKOUT1_N
Notes:
1. Series 0.01uF capacitor coupled.
Chapter 3: Board Component Descriptions
UG1302 (v1.0) December 21, 2018 www.xilinx.com
VCU128 Board User Guide 54
Send Feedback

Xilinx VCU128 Specifications

General

Brand	Xilinx
Model	VCU128
Category	Motherboard
Language	English