Xilinx Virtex-5 FPGA ML561

74 www.xilinx.com Virtex-5 FPGA ML561 User Guide
UG199 (v1.2.1) June 15, 2009
Chapter 7: ML561 Hardware-Simulation Correlation
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Figure 7-26: DDR2 DIMM Write Extrapolation - Eye Scope Shot at Receiver IOB (Slow Corner)
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UG199_c7_26_071007
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Probe 6:U3_B01.J1 (at die)
♦ 333 MHz, Slow, PRBS6, 82% UI
♦ Cursor 1: 1.1028V, 1.2399 ns
♦ Cursor 2: 1.0253V, 2.4671 ns
♦ Delta Voltage = 77.5 mV, Delta Time = 1.2272 ns (82% UI)
Figure 7-27: DDR2 DIMM Write Extrapolation - Waveform Scope Shot at Receiver IOB (Slow Corner)
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UG199_c7_27_071007
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Probe 6:U3_B01.J1 (at die)