Xilinx Virtex-5 FPGA ML561

78 www.xilinx.com Virtex-5 FPGA ML561 User Guide
UG199 (v1.2.1) June 15, 2009
Chapter 7: ML561 Hardware-Simulation Correlation
R
Figure 7-33: DDR2 DIMM Read HW Measurement - Waveform Scope Shot at Probe Point (FPGA1 Via)
UG199_c7_33_071107
Figure 7-34: DDR2 DIMM Read Correlation - Waveform Scope Shot at Probe Point (Slow Corner)
25.000 35.000 45.000 55.000 65.000 75.000
-200.0
0.000
200.0
400.0
600.0
800.0
1000.0
1200.0
1400.0
1600.0
1800.0
Time (ns)
Voltage (mV)
UG199_c7_34_071007
Probe 3:C8.1 (at pin)