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Xilinx Virtex-5 FPGA ML561 User Manual

Xilinx Virtex-5 FPGA ML561
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82 www.xilinx.com Virtex-5 FPGA ML561 User Guide
UG199 (v1.2.1) June 15, 2009
Chapter 7: ML561 Hardware-Simulation Correlation
R
Figure 7-40: QDRII Write HW Measurement - Eye Scope Shot at Probe Point (QDRII Memory Via)
UG199_c7_40_071107
Figure 7-41: QDRII Write Correlation - Eye Scope Shot at Probe Point (Slow Corner)
0.000 400.0 800.0 1200.0 1600.0
-200.0
0.000
200.0
400.0
600.0
800.0
1000.0
1200.0
1400.0
1600.0
1800.0
Time (ps)
Voltage (mV)
UG199_c7_41_070907
Probe 3:C7.1 (at pin)
300 MHz, Slow, PRBS6, 83.5% UI
Cursor 1: 699.1 mV, 90.0 ps
Cursor 2: 801.0 mV, 1.4770 ns
Delta Voltage = 101.9 mV, Delta Time = 1.3870 ns (83.5% UI)

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Xilinx Virtex-5 FPGA ML561 Specifications

General IconGeneral
BrandXilinx
ModelVirtex-5 FPGA ML561
CategoryMotherboard
LanguageEnglish

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