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Xilinx Virtex-7 FPGA VC7222 IBERT User Manual

Xilinx Virtex-7 FPGA VC7222 IBERT
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VC7222 IBERT Getting Started Guide www.xilinx.com 49
UG971 (v5.0) June 12, 2014
11. In the new window, select Tools Run Tcl Script. In the Run Script window,
navigate to add_scm2.tcl in the extracted files and press OK. The SuperClock-2
Module Design Sources and Constraints are automatically added to the example
design (Figure 2-9).
X-Ref Target - Figure 2-9
Figure 2-9: Sources after Running add_scm2.tcl
8*BFBB
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Xilinx Virtex-7 FPGA VC7222 IBERT Specifications

General IconGeneral
BrandXilinx
ModelVirtex-7 FPGA VC7222 IBERT
CategoryMotherboard
LanguageEnglish

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