Xilinx ZCU102 User Manual

ZCU102 Evaluation Board User Guide www.xilinx.com 122
UG1182 (v1.2) March 20, 2017
Appendix B: Master Constraints File Listing
set_property PACKAGE_PIN R4 [get_ports "FMC_HPC0_DP6_C2M_P"]
set_property PACKAGE_PIN T1 [get_ports "FMC_HPC0_DP6_M2C_N"]
set_property PACKAGE_PIN T2 [get_ports "FMC_HPC0_DP6_M2C_P"]
set_property PACKAGE_PIN N3 [get_ports "FMC_HPC0_DP7_C2M_N"]
set_property PACKAGE_PIN N4 [get_ports "FMC_HPC0_DP7_C2M_P"]
set_property PACKAGE_PIN M1 [get_ports "FMC_HPC0_DP7_M2C_N"]
set_property PACKAGE_PIN M2 [get_ports "FMC_HPC0_DP7_M2C_P"]
set_property PACKAGE_PIN Y3 [get_ports "FMC_HPC0_LA00_CC_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA00_CC_N"]
set_property PACKAGE_PIN Y4 [get_ports "FMC_HPC0_LA00_CC_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA00_CC_P"]
set_property PACKAGE_PIN AC4 [get_ports "FMC_HPC0_LA01_CC_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA01_CC_N"]
set_property PACKAGE_PIN AB4 [get_ports "FMC_HPC0_LA01_CC_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA01_CC_P"]
set_property PACKAGE_PIN V1 [get_ports "FMC_HPC0_LA02_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA02_N"]
set_property PACKAGE_PIN V2 [get_ports "FMC_HPC0_LA02_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA02_P"]
set_property PACKAGE_PIN Y1 [get_ports "FMC_HPC0_LA03_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA03_N"]
set_property PACKAGE_PIN Y2 [get_ports "FMC_HPC0_LA03_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA03_P"]
set_property PACKAGE_PIN AA1 [get_ports "FMC_HPC0_LA04_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA04_N"]
set_property PACKAGE_PIN AA2 [get_ports "FMC_HPC0_LA04_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA04_P"]
set_property PACKAGE_PIN AC3 [get_ports "FMC_HPC0_LA05_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA05_N"]
set_property PACKAGE_PIN AB3 [get_ports "FMC_HPC0_LA05_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA05_P"]
set_property PACKAGE_PIN AC1 [get_ports "FMC_HPC0_LA06_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA06_N"]
set_property PACKAGE_PIN AC2 [get_ports "FMC_HPC0_LA06_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA06_P"]
set_property PACKAGE_PIN U4 [get_ports "FMC_HPC0_LA07_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA07_N"]
set_property PACKAGE_PIN U5 [get_ports "FMC_HPC0_LA07_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA07_P"]
set_property PACKAGE_PIN V3 [get_ports "FMC_HPC0_LA08_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA08_N"]
set_property PACKAGE_PIN V4 [get_ports "FMC_HPC0_LA08_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA08_P"]
set_property PACKAGE_PIN W1 [get_ports "FMC_HPC0_LA09_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA09_N"]
set_property PACKAGE_PIN W2 [get_ports "FMC_HPC0_LA09_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA09_P"]
set_property PACKAGE_PIN W4 [get_ports "FMC_HPC0_LA10_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA10_N"]
set_property PACKAGE_PIN W5 [get_ports "FMC_HPC0_LA10_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA10_P"]
set_property PACKAGE_PIN AB5 [get_ports "FMC_HPC0_LA11_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA11_N"]
set_property PACKAGE_PIN AB6 [get_ports "FMC_HPC0_LA11_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA11_P"]
set_property PACKAGE_PIN W6 [get_ports "FMC_HPC0_LA12_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA12_N"]
set_property PACKAGE_PIN W7 [get_ports "FMC_HPC0_LA12_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_HPC0_LA12_P"]
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Xilinx ZCU102 Specifications

General

Processor	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
SD Card	MicroSD card slot
Video Outputs	DisplayPort
FPGA	Xilinx Zynq UltraScale+ XCZU9EG-2FFVB1156E
Memory	4GB DDR4 Component Memory
Storage	MicroSD card slot
Ethernet	Gigabit Ethernet
USB	1 x USB 3.0, 1 x USB 2.0
PCIe	PCIe Gen2 x4
Display	DisplayPort
Power Supply	12V DC input
SATA	SATA 3.0
Clocking	Programmable clocks
Operating System Support	PetaLinux